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<title>linux.git/arch/xtensa/kernel, branch v3.14</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>Merge tag 'xtensa-for-next-20140221-1' into for_next</title>
<updated>2014-02-24T08:34:36+00:00</updated>
<author>
<name>Chris Zankel</name>
<email>chris@zankel.net</email>
</author>
<published>2014-02-24T08:34:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=b3fdfc1b4b641d372e35ced98814289bc60bc5d1'/>
<id>b3fdfc1b4b641d372e35ced98814289bc60bc5d1</id>
<content type='text'>
Xtensa fixes for 3.14:
- allow booting xtfpga on boards with new uBoot and &gt;128MBytes memory;
- drop nonexistent GPIO32 support from fsf variant;
- don't select USE_GENERIC_SMP_HELPERS;
- enable common clock framework support, set up ethoc clock on xtfpga;
- wire up sched_setattr and sched_getattr syscalls.

Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
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<pre>
Xtensa fixes for 3.14:
- allow booting xtfpga on boards with new uBoot and &gt;128MBytes memory;
- drop nonexistent GPIO32 support from fsf variant;
- don't select USE_GENERIC_SMP_HELPERS;
- enable common clock framework support, set up ethoc clock on xtfpga;
- wire up sched_setattr and sched_getattr syscalls.

Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>xtensa: support common clock framework</title>
<updated>2014-02-21T17:33:42+00:00</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2014-01-29T02:20:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=bda8932d234aeaee870ac666e776a5ba03bb13a4'/>
<id>bda8932d234aeaee870ac666e776a5ba03bb13a4</id>
<content type='text'>
Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
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<pre>
Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>xtensa: fix fast_syscall_spill_registers</title>
<updated>2014-01-29T21:47:26+00:00</updated>
<author>
<name>Chris Zankel</name>
<email>chris@zankel.net</email>
</author>
<published>2014-01-29T06:09:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=c0e50d41126e4786d9cf1105bdf783e55c99f915'/>
<id>c0e50d41126e4786d9cf1105bdf783e55c99f915</id>
<content type='text'>
The original implementation could clobber registers under certain conditions.

The Xtensa processor architecture uses windowed registers and the original
implementation was using a4 as a temporary register, which under certain
conditions could be register a0 of the oldest window frame, and didn't always
restore the content correctly.

By moving the _spill_registers routine inside the fast system call, it frees
up one more register (the return address is not required anymore) for the
spill routine.

Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The original implementation could clobber registers under certain conditions.

The Xtensa processor architecture uses windowed registers and the original
implementation was using a4 as a temporary register, which under certain
conditions could be register a0 of the oldest window frame, and didn't always
restore the content correctly.

By moving the _spill_registers routine inside the fast system call, it frees
up one more register (the return address is not required anymore) for the
spill routine.

Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>xtensa: fix fast_syscall_spill_registers</title>
<updated>2014-01-29T06:09:51+00:00</updated>
<author>
<name>Chris Zankel</name>
<email>chris@zankel.net</email>
</author>
<published>2014-01-29T06:09:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=6b5a1f74e50170e64104135490dc32b657483594'/>
<id>6b5a1f74e50170e64104135490dc32b657483594</id>
<content type='text'>
The original implementation could clobber registers under certain conditions.

The Xtensa processor architecture uses windowed registers and the original
implementation was using a4 as a temporary register, which under certain
conditions could be register a0 of the oldest window frame, and didn't always
restore the content correctly.

By moving the _spill_registers routine inside the fast system call, it frees
up one more register (the return address is not required anymore) for the
spill routine.

Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The original implementation could clobber registers under certain conditions.

The Xtensa processor architecture uses windowed registers and the original
implementation was using a4 as a temporary register, which under certain
conditions could be register a0 of the oldest window frame, and didn't always
restore the content correctly.

By moving the _spill_registers routine inside the fast system call, it frees
up one more register (the return address is not required anymore) for the
spill routine.

Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>xtensa: save current register frame in fast_syscall_spill_registers_fixup</title>
<updated>2014-01-25T19:24:38+00:00</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2013-10-30T12:18:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=3251f1e27a5a17f0efd436cfd1e7b9896cfab0a0'/>
<id>3251f1e27a5a17f0efd436cfd1e7b9896cfab0a0</id>
<content type='text'>
We need it saved because it contains a3 where we track which register
windows we still need to spill, and fixup handler may call C exception
handlers. Also fix comments.

Cc: stable@vger.kernel.org
Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
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<pre>
We need it saved because it contains a3 where we track which register
windows we still need to spill, and fixup handler may call C exception
handlers. Also fix comments.

Cc: stable@vger.kernel.org
Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>xtensa: introduce spill_registers_kernel macro</title>
<updated>2014-01-25T19:20:09+00:00</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2014-01-22T04:04:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=e2fd1374c705abe4661df3fb6fadb3879c7c1846'/>
<id>e2fd1374c705abe4661df3fb6fadb3879c7c1846</id>
<content type='text'>
Most in-kernel users want registers spilled on the kernel stack and
don't require PS.EXCM to be set. That means that they don't need fixup
routine and could reuse regular window overflow mechanism for that,
which makes spill routine very simple.

Cc: stable@vger.kernel.org
Suggested-by: Chris Zankel &lt;chris@zankel.net&gt;
Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Most in-kernel users want registers spilled on the kernel stack and
don't require PS.EXCM to be set. That means that they don't need fixup
routine and could reuse regular window overflow mechanism for that,
which makes spill routine very simple.

Cc: stable@vger.kernel.org
Suggested-by: Chris Zankel &lt;chris@zankel.net&gt;
Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>xtensa: export ccount_freq</title>
<updated>2014-01-19T16:00:48+00:00</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2014-01-19T16:00:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=45ec8860be2f681b2e3e521a3fb4554ec29fbaac'/>
<id>45ec8860be2f681b2e3e521a3fb4554ec29fbaac</id>
<content type='text'>
Now that ccount_freq is used in udelay and ndelay it needs to be
exported in order to be available to modules.

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
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<pre>
Now that ccount_freq is used in udelay and ndelay it needs to be
exported in order to be available to modules.

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>xtensa: remap io area defined in device tree</title>
<updated>2014-01-14T20:25:14+00:00</updated>
<author>
<name>Baruch Siach</name>
<email>baruch@tkos.co.il</email>
</author>
<published>2013-12-29T09:03:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=6cb971114f633a0bf240c20b681d989b45e3ec56'/>
<id>6cb971114f633a0bf240c20b681d989b45e3ec56</id>
<content type='text'>
Use the simple-bus node to discover the io area, and remap the cached and
bypass io ranges. The parent-bus-address value of the first triplet in the
"ranges" property is used. This value is rounded down to the nearest 256MB
boundary. The length of the io area is fixed at 256MB; the "ranges" property
length value is ignored.

Other limitations: (1) only the first simple-bus node is considered, and (2)
only the first triplet of the "ranges" property is considered.

See ePAPR 1.1 §6.5 for the simple-bus node description, and §2.3.8 for the
"ranges" property description.

Signed-off-by: Baruch Siach &lt;baruch@tkos.co.il&gt;
Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Use the simple-bus node to discover the io area, and remap the cached and
bypass io ranges. The parent-bus-address value of the first triplet in the
"ranges" property is used. This value is rounded down to the nearest 256MB
boundary. The length of the io area is fixed at 256MB; the "ranges" property
length value is ignored.

Other limitations: (1) only the first simple-bus node is considered, and (2)
only the first triplet of the "ranges" property is considered.

See ePAPR 1.1 §6.5 for the simple-bus node description, and §2.3.8 for the
"ranges" property description.

Signed-off-by: Baruch Siach &lt;baruch@tkos.co.il&gt;
Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>xtensa: support default device tree buses</title>
<updated>2014-01-14T20:24:12+00:00</updated>
<author>
<name>Baruch Siach</name>
<email>baruch@tkos.co.il</email>
</author>
<published>2013-12-23T18:49:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=f8935f307fe46faa1a829a6b76ee95ca9ba67d20'/>
<id>f8935f307fe46faa1a829a6b76ee95ca9ba67d20</id>
<content type='text'>
This currently includes simple-bus.

Signed-off-by: Baruch Siach &lt;baruch@tkos.co.il&gt;
Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This currently includes simple-bus.

Signed-off-by: Baruch Siach &lt;baruch@tkos.co.il&gt;
Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>xtensa: initialize device tree clock sources</title>
<updated>2014-01-14T20:24:05+00:00</updated>
<author>
<name>Baruch Siach</name>
<email>baruch@tkos.co.il</email>
</author>
<published>2013-12-23T18:49:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=b087ab7f257022027077cc02d8056b64828c6ae4'/>
<id>b087ab7f257022027077cc02d8056b64828c6ae4</id>
<content type='text'>
Signed-off-by: Baruch Siach &lt;baruch@tkos.co.il&gt;
Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Baruch Siach &lt;baruch@tkos.co.il&gt;
Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</pre>
</div>
</content>
</entry>
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