Pull xtensa updates from Max Filippov:

 - reorganize exception vectors placement

 - small cleanups (drop unused functions/headers/defconfig entries,
   spelling fixes)

* tag 'xtensa-20200206' of git://github.com/jcmvbkbc/linux-xtensa:
  xtensa: ISS: improve simcall assembly
  xtensa: reorganize vectors placement
  xtensa: separate SMP and XIP support
  xtensa: move fast exception handlers close to vectors
  arch/xtensa: fix Kconfig typos for HAVE_SMP
  xtensa: clean up optional XCHAL_* definitions
  xtensa: drop unused function fast_coprocessor_double
  xtensa: drop empty platform_* functions from platforms
  xtensa: clean up platform headers
  xtensa: drop set_except_vector declaration
  xtensa: configs: Cleanup old Kconfig IO scheduler options

Allow vectors to be either merged into the kernel .text or put at a
fixed virtual address independently of XIP option. Drop option that
puts vectors at a fixed offset from the kernel text. Add choice to
Kconfig.
Vectors at fixed virtual address may be useful for XIP-aware MTD support
and for noMMU configurations with available IRAM. Configurations without
VECBASE register must put their vectors at specific locations regardless
of the selected option. All other configurations should happily use
merged vectors.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>

On XIP kernels it makes sense to have exception vectors and fast
exception handlers together (in a fast memory). In addition, with MTD
XIP support both vectors and fast exception handlers must be outside of
the FLASH.

Add section .exception.text and move fast exception handlers to it.
Put it together with vectors when vectors are outside of the .text.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>

con_init in tty/vt.c will now set conswitchp to dummy_con if it's unset.
Drop it from arch setup code.

Signed-off-by: Arvind Sankar <nivedita@alum.mit.edu>
Link: https://lore.kernel.org/r/20191218214506.49252-25-nivedita@alum.mit.edu
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

XIP (eXecute In Place) kernel image is the image that can be run
directly from ROM, using RAM only for writable data.

XIP xtensa kernel differs from regular xtensa kernel in the following
ways:
- it has exception/IRQ vectors merged into text section. No vectors
  relocation takes place at kernel startup.
- .data/.bss location must be specified in the kernel configuration,
  its content is copied there in the _startup function.
- .init.text is merged with the rest of text and is executed from ROM.
- when MMU is used the virtual address where the kernel will be mapped
  must be specified in the kernel configuration. It may be in the KSEG
  or in the KIO, __pa macro is adjusted to be able to handle both.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>

The xtensa free_initrd_mem() verifies that initrd is mapped and then
frees its memory using free_reserved_area().

The initrd is considered mapped when its memory was successfully reserved
with mem_reserve().

Resetting initrd_start to 0 in case of mem_reserve() failure allows to
switch to generic free_initrd_mem() implementation.

Signed-off-by: Mike Rapoport <rppt@linux.ibm.com>
Message-Id: <1563977432-8376-1-git-send-email-rppt@linux.ibm.com>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>

ITLB entry modifications must be followed by the isync instruction
before the new entries are possibly used. cpu_reset lacks one isync
between ITLB way 6 initialization and jump to the identity mapping.
Add missing isync to xtensa cpu_reset.

Cc: stable@vger.kernel.org
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>

xtensa-specific PCI initialization code has significantly bitrotted over
time because there's no platform that use it. Get rid of remaining
non-functioning initialization and remove platform_pcibios_* interface.
A new platform that would use PCI on xtensa will configure PCI
controller using device tree.

Drop variables pci_ctrl_head, pci_bus_count and functions pcibios_init,
pci_controller_apertures, platform_pcibios_init and
platform_pcibios_fixup.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>

Since commit 9012d011660ea5cf2 ("compiler: allow all arches to enable
CONFIG_OPTIMIZE_INLINING"), xtensa:tinyconfig fails to build with section
mismatch errors.

WARNING: vmlinux.o(.text.unlikely+0x68): Section mismatch in reference
	from the function ___pa()
	to the function .meminit.text:memblock_reserve()
WARNING: vmlinux.o(.text.unlikely+0x74): Section mismatch in reference
	from the function mem_reserve()
	to the function .meminit.text:memblock_reserve()
FATAL: modpost: Section mismatches detected.

This was not seen prior to the above mentioned commit because mem_reserve()
was always inlined.

Mark mem_reserve(() as __init_memblock to have it reside in the same
section as memblock_reserve().

Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Message-Id: <1559220098-9955-1-git-send-email-linux@roeck-us.net>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>

Implement atomic primitives using exclusive access opcodes available in
the recent xtensa cores.
Since l32ex/s32ex don't have any memory ordering guarantees don't define
__smp_mb__before_atomic/__smp_mb__after_atomic to make them use memw.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>