<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/arch/x86/kernel/cpu/microcode, branch v6.18</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>x86/microcode/AMD: Add Zen5 model 0x44, stepping 0x1 minrev</title>
<updated>2025-11-14T13:04:49+00:00</updated>
<author>
<name>Borislav Petkov (AMD)</name>
<email>bp@alien8.de</email>
</author>
<published>2025-11-14T13:01:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=dd14022a7ce96963aa923e35cf4bcc8c32f95840'/>
<id>dd14022a7ce96963aa923e35cf4bcc8c32f95840</id>
<content type='text'>
Add the minimum Entrysign revision for that model+stepping to the list
of minimum revisions.

Fixes: 50cef76d5cb0 ("x86/microcode/AMD: Load only SHA256-checksummed patches")
Reported-by: Andrew Cooper &lt;andrew.cooper3@citrix.com&gt;
Signed-off-by: Borislav Petkov (AMD) &lt;bp@alien8.de&gt;
Cc: &lt;stable@kernel.org&gt;
Link: https://lore.kernel.org/r/e94dd76b-4911-482f-8500-5c848a3df026@citrix.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add the minimum Entrysign revision for that model+stepping to the list
of minimum revisions.

Fixes: 50cef76d5cb0 ("x86/microcode/AMD: Load only SHA256-checksummed patches")
Reported-by: Andrew Cooper &lt;andrew.cooper3@citrix.com&gt;
Signed-off-by: Borislav Petkov (AMD) &lt;bp@alien8.de&gt;
Cc: &lt;stable@kernel.org&gt;
Link: https://lore.kernel.org/r/e94dd76b-4911-482f-8500-5c848a3df026@citrix.com
</pre>
</div>
</content>
</entry>
<entry>
<title>x86/microcode/AMD: Add more known models to entry sign checking</title>
<updated>2025-11-07T11:12:21+00:00</updated>
<author>
<name>Mario Limonciello (AMD)</name>
<email>superm1@kernel.org</email>
</author>
<published>2025-11-06T18:28:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=d23550efc6800841b4d1639784afaebdea946ae0'/>
<id>d23550efc6800841b4d1639784afaebdea946ae0</id>
<content type='text'>
Two Zen5 systems are missing from need_sha_check(). Add them.

Fixes: 50cef76d5cb0 ("x86/microcode/AMD: Load only SHA256-checksummed patches")
Signed-off-by: Mario Limonciello (AMD) &lt;superm1@kernel.org&gt;
Signed-off-by: Borislav Petkov (AMD) &lt;bp@alien8.de&gt;
Cc: &lt;stable@kernel.org&gt;
Link: https://patch.msgid.link/20251106182904.4143757-1-superm1@kernel.org
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Two Zen5 systems are missing from need_sha_check(). Add them.

Fixes: 50cef76d5cb0 ("x86/microcode/AMD: Load only SHA256-checksummed patches")
Signed-off-by: Mario Limonciello (AMD) &lt;superm1@kernel.org&gt;
Signed-off-by: Borislav Petkov (AMD) &lt;bp@alien8.de&gt;
Cc: &lt;stable@kernel.org&gt;
Link: https://patch.msgid.link/20251106182904.4143757-1-superm1@kernel.org
</pre>
</div>
</content>
</entry>
<entry>
<title>x86/microcode/AMD: Limit Entrysign signature checking to known generations</title>
<updated>2025-10-27T16:07:17+00:00</updated>
<author>
<name>Borislav Petkov (AMD)</name>
<email>bp@alien8.de</email>
</author>
<published>2025-10-23T12:46:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=8a9fb5129e8e64d24543ebc70de941a2d77a9e77'/>
<id>8a9fb5129e8e64d24543ebc70de941a2d77a9e77</id>
<content type='text'>
Limit Entrysign sha256 signature checking to CPUs in the range Zen1-Zen5.

X86_BUG cannot be used here because the loading on the BSP happens way
too early, before the cpufeatures machinery has been set up.

Signed-off-by: Borislav Petkov (AMD) &lt;bp@alien8.de&gt;
Link: https://patch.msgid.link/all/20251023124629.5385-1-bp@kernel.org
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Limit Entrysign sha256 signature checking to CPUs in the range Zen1-Zen5.

X86_BUG cannot be used here because the loading on the BSP happens way
too early, before the cpufeatures machinery has been set up.

Signed-off-by: Borislav Petkov (AMD) &lt;bp@alien8.de&gt;
Link: https://patch.msgid.link/all/20251023124629.5385-1-bp@kernel.org
</pre>
</div>
</content>
</entry>
<entry>
<title>x86/microcode: Fix Entrysign revision check for Zen1/Naples</title>
<updated>2025-10-21T10:16:51+00:00</updated>
<author>
<name>Andrew Cooper</name>
<email>andrew.cooper3@citrix.com</email>
</author>
<published>2025-10-20T14:41:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=876f0d43af78639790bee0e57b39d498ae35adcf'/>
<id>876f0d43af78639790bee0e57b39d498ae35adcf</id>
<content type='text'>
... to match AMD's statement here:

https://www.amd.com/en/resources/product-security/bulletin/amd-sb-7033.html

Fixes: 50cef76d5cb0 ("x86/microcode/AMD: Load only SHA256-checksummed patches")
Signed-off-by: Andrew Cooper &lt;andrew.cooper3@citrix.com&gt;
Signed-off-by: Borislav Petkov (AMD) &lt;bp@alien8.de&gt;
Cc: &lt;stable@kernel.org&gt;
Link: https://patch.msgid.link/20251020144124.2930784-1-andrew.cooper3@citrix.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
... to match AMD's statement here:

https://www.amd.com/en/resources/product-security/bulletin/amd-sb-7033.html

Fixes: 50cef76d5cb0 ("x86/microcode/AMD: Load only SHA256-checksummed patches")
Signed-off-by: Andrew Cooper &lt;andrew.cooper3@citrix.com&gt;
Signed-off-by: Borislav Petkov (AMD) &lt;bp@alien8.de&gt;
Cc: &lt;stable@kernel.org&gt;
Link: https://patch.msgid.link/20251020144124.2930784-1-andrew.cooper3@citrix.com
</pre>
</div>
</content>
</entry>
<entry>
<title>x86/microcode: Add microcode loader debugging functionality</title>
<updated>2025-09-04T14:15:19+00:00</updated>
<author>
<name>Borislav Petkov (AMD)</name>
<email>bp@alien8.de</email>
</author>
<published>2025-08-20T13:50:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=43181a47263dd9f2bee0afd688a841b09f9b7d12'/>
<id>43181a47263dd9f2bee0afd688a841b09f9b7d12</id>
<content type='text'>
Instead of adding ad-hoc debugging glue to the microcode loader each
time I need it, add debugging functionality which is not built by
default.

Simulate all patch handling the loader does except the actual loading of
the microcode patch into the hardware.

Signed-off-by: Borislav Petkov (AMD) &lt;bp@alien8.de&gt;
Link: https://lore.kernel.org/20250820135043.19048-3-bp@kernel.org
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Instead of adding ad-hoc debugging glue to the microcode loader each
time I need it, add debugging functionality which is not built by
default.

Simulate all patch handling the loader does except the actual loading of
the microcode patch into the hardware.

Signed-off-by: Borislav Petkov (AMD) &lt;bp@alien8.de&gt;
Link: https://lore.kernel.org/20250820135043.19048-3-bp@kernel.org
</pre>
</div>
</content>
</entry>
<entry>
<title>x86/microcode: Add microcode= cmdline parsing</title>
<updated>2025-09-04T14:02:20+00:00</updated>
<author>
<name>Borislav Petkov (AMD)</name>
<email>bp@alien8.de</email>
</author>
<published>2025-08-20T13:50:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=632ff61706473127cdc3b779bf24d368e3856ab3'/>
<id>632ff61706473127cdc3b779bf24d368e3856ab3</id>
<content type='text'>
Add a "microcode=" command line argument after which all options can be
passed in a comma-separated list.

Signed-off-by: Borislav Petkov (AMD) &lt;bp@alien8.de&gt;
Reviewed-by: Sohil Mehta &lt;sohil.mehta@intel.com&gt;
Reviewed-by: Chang S. Bae &lt;chang.seok.bae@intel.com&gt;
Link: https://lore.kernel.org/20250820135043.19048-2-bp@kernel.org
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add a "microcode=" command line argument after which all options can be
passed in a comma-separated list.

Signed-off-by: Borislav Petkov (AMD) &lt;bp@alien8.de&gt;
Reviewed-by: Sohil Mehta &lt;sohil.mehta@intel.com&gt;
Reviewed-by: Chang S. Bae &lt;chang.seok.bae@intel.com&gt;
Link: https://lore.kernel.org/20250820135043.19048-2-bp@kernel.org
</pre>
</div>
</content>
</entry>
<entry>
<title>x86/microcode/intel: Refresh the revisions that determine old_microcode</title>
<updated>2025-09-04T13:57:17+00:00</updated>
<author>
<name>Sohil Mehta</name>
<email>sohil.mehta@intel.com</email>
</author>
<published>2025-08-18T19:01:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=855042367e3f1ddc1e896fcd00af9c397d1174cb'/>
<id>855042367e3f1ddc1e896fcd00af9c397d1174cb</id>
<content type='text'>
Update the minimum expected revisions of Intel microcode based on the
microcode-20250512 (May 2025) release.

Signed-off-by: Sohil Mehta &lt;sohil.mehta@intel.com&gt;
Signed-off-by: Dave Hansen &lt;dave.hansen@linux.intel.com&gt;
Signed-off-by: Borislav Petkov (AMD) &lt;bp@alien8.de&gt;
Link: https://lore.kernel.org/all/20250818190137.3525414-2-sohil.mehta%40intel.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Update the minimum expected revisions of Intel microcode based on the
microcode-20250512 (May 2025) release.

Signed-off-by: Sohil Mehta &lt;sohil.mehta@intel.com&gt;
Signed-off-by: Dave Hansen &lt;dave.hansen@linux.intel.com&gt;
Signed-off-by: Borislav Petkov (AMD) &lt;bp@alien8.de&gt;
Link: https://lore.kernel.org/all/20250818190137.3525414-2-sohil.mehta%40intel.com
</pre>
</div>
</content>
</entry>
<entry>
<title>x86/microcode/AMD: Handle the case of no BIOS microcode</title>
<updated>2025-08-27T08:24:10+00:00</updated>
<author>
<name>Borislav Petkov (AMD)</name>
<email>bp@alien8.de</email>
</author>
<published>2025-08-20T09:58:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=fcf8239ad6a5de54fa7ce18e464c6b5951b982cb'/>
<id>fcf8239ad6a5de54fa7ce18e464c6b5951b982cb</id>
<content type='text'>
Machines can be shipped without any microcode in the BIOS. Which means,
the microcode patch revision is 0.

Handle that gracefully.

Fixes: 94838d230a6c ("x86/microcode/AMD: Use the family,model,stepping encoded in the patch ID")
Reported-by: Vítek Vávra &lt;vit.vavra.kh@gmail.com&gt;
Signed-off-by: Borislav Petkov (AMD) &lt;bp@alien8.de&gt;
Cc: &lt;stable@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Machines can be shipped without any microcode in the BIOS. Which means,
the microcode patch revision is 0.

Handle that gracefully.

Fixes: 94838d230a6c ("x86/microcode/AMD: Use the family,model,stepping encoded in the patch ID")
Reported-by: Vítek Vávra &lt;vit.vavra.kh@gmail.com&gt;
Signed-off-by: Borislav Petkov (AMD) &lt;bp@alien8.de&gt;
Cc: &lt;stable@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'x86_microcode_for_v6.17_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip</title>
<updated>2025-07-30T00:16:26+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2025-07-30T00:16:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=01fce21e1a890462ba1f37b577fc96c10753c608'/>
<id>01fce21e1a890462ba1f37b577fc96c10753c608</id>
<content type='text'>
Pull x86 microcode loader update from Borislav Petkov:

 - Switch the microcode loader from using the fake platform device to
   the new simple faux bus

* tag 'x86_microcode_for_v6.17_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/microcode: Move away from using a fake platform device
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull x86 microcode loader update from Borislav Petkov:

 - Switch the microcode loader from using the fake platform device to
   the new simple faux bus

* tag 'x86_microcode_for_v6.17_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/microcode: Move away from using a fake platform device
</pre>
</div>
</content>
</entry>
<entry>
<title>x86/microcode: Move away from using a fake platform device</title>
<updated>2025-07-09T11:12:08+00:00</updated>
<author>
<name>Greg Kroah-Hartman</name>
<email>gregkh@linuxfoundation.org</email>
</author>
<published>2025-07-01T10:54:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=9b355cdb63b1e43434d7ac57430d3e68de58338d'/>
<id>9b355cdb63b1e43434d7ac57430d3e68de58338d</id>
<content type='text'>
Downloading firmware needs a device to hang off of, and so a platform device
seemed like the simplest way to do this.  Now that we have a faux device
interface, use that instead as this "microcode device" is not anything
resembling a platform device at all.

Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
Signed-off-by: Borislav Petkov (AMD) &lt;bp@alien8.de&gt;
Reviewed-by: Sohil Mehta &lt;sohil.mehta@intel.com&gt;
Link: https://lore.kernel.org/2025070121-omission-small-9308@gregkh
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Downloading firmware needs a device to hang off of, and so a platform device
seemed like the simplest way to do this.  Now that we have a faux device
interface, use that instead as this "microcode device" is not anything
resembling a platform device at all.

Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
Signed-off-by: Borislav Petkov (AMD) &lt;bp@alien8.de&gt;
Reviewed-by: Sohil Mehta &lt;sohil.mehta@intel.com&gt;
Link: https://lore.kernel.org/2025070121-omission-small-9308@gregkh
</pre>
</div>
</content>
</entry>
</feed>
