<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/arch/x86/kernel/cpu/intel.c, branch v2.6.28</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>x86: print out apic id in hex format</title>
<updated>2008-10-16T14:53:09+00:00</updated>
<author>
<name>Yinghai Lu</name>
<email>yhlu.kernel@gmail.com</email>
</author>
<published>2008-09-11T04:56:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=823b259b80158a5fb694f6784e18b5bae669c599'/>
<id>823b259b80158a5fb694f6784e18b5bae669c599</id>
<content type='text'>
Signed-off-by: Yinghai Lu &lt;yhlu.kernel@gmail.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Yinghai Lu &lt;yhlu.kernel@gmail.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: extended "flags" to show virtualization HW feature in /proc/cpuinfo</title>
<updated>2008-09-10T12:00:56+00:00</updated>
<author>
<name>Sheng Yang</name>
<email>sheng.yang@intel.com</email>
</author>
<published>2008-09-10T10:53:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=e38e05a85828dac23540cd007df5f20985388afc'/>
<id>e38e05a85828dac23540cd007df5f20985388afc</id>
<content type='text'>
The hardware virtualization technology evolves very fast. But currently
it's hard to tell if your CPU support a certain kind of HW technology
without digging into the source code.

The patch add a new catagory in "flags" under /proc/cpuinfo. Now "flags"
can indicate the (important) HW virtulization features the CPU supported
as well.

Current implementation just cover Intel VMX side.

Signed-off-by: Sheng Yang &lt;sheng.yang@intel.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The hardware virtualization technology evolves very fast. But currently
it's hard to tell if your CPU support a certain kind of HW technology
without digging into the source code.

The patch add a new catagory in "flags" under /proc/cpuinfo. Now "flags"
can indicate the (important) HW virtulization features the CPU supported
as well.

Current implementation just cover Intel VMX side.

Signed-off-by: Sheng Yang &lt;sheng.yang@intel.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: intel.c put workaround for old cpus together</title>
<updated>2008-09-10T06:21:06+00:00</updated>
<author>
<name>Yinghai Lu</name>
<email>yhlu.kernel@gmail.com</email>
</author>
<published>2008-09-09T23:40:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=4052704d92c3172ebc13cc0cc8df8ba2bd446a5c'/>
<id>4052704d92c3172ebc13cc0cc8df8ba2bd446a5c</id>
<content type='text'>
consolidate the code some more.

No change in functionality intended.

Signed-off-by: Yinghai Lu &lt;yhlu.kernel@gmail.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
<content type='xhtml'>
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<pre>
consolidate the code some more.

No change in functionality intended.

Signed-off-by: Yinghai Lu &lt;yhlu.kernel@gmail.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: make intel.c have 64-bit support code</title>
<updated>2008-09-10T06:21:03+00:00</updated>
<author>
<name>Yinghai Lu</name>
<email>yhlu.kernel@gmail.com</email>
</author>
<published>2008-09-09T23:40:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=185f3b9da24c09c26b784591ed354fe57998a7b1'/>
<id>185f3b9da24c09c26b784591ed354fe57998a7b1</id>
<content type='text'>
prepare for unification.

Signed-off-by: Yinghai Lu &lt;yhlu.kernel@gmail.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
prepare for unification.

Signed-off-by: Yinghai Lu &lt;yhlu.kernel@gmail.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'x86/pebs' into x86/unify-cpu-detect</title>
<updated>2008-09-10T06:20:51+00:00</updated>
<author>
<name>Ingo Molnar</name>
<email>mingo@elte.hu</email>
</author>
<published>2008-09-10T06:20:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=81faaae45701484bd7368336e02f2a846153b22f'/>
<id>81faaae45701484bd7368336e02f2a846153b22f</id>
<content type='text'>
Conflicts:
	arch/x86/Kconfig.cpu
	include/asm-x86/ds.h

Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Conflicts:
	arch/x86/Kconfig.cpu
	include/asm-x86/ds.h

Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: little clean up of intel.c/intel_64.c</title>
<updated>2008-09-08T13:46:03+00:00</updated>
<author>
<name>Yinghai Lu</name>
<email>yhlu.kernel@gmail.com</email>
</author>
<published>2008-09-08T00:58:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=f69feff720497237ae9dd2f4604921bd3080c421'/>
<id>f69feff720497237ae9dd2f4604921bd3080c421</id>
<content type='text'>
Signed-off-by: Yinghai Lu &lt;yhlu.kernel@gmail.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Yinghai Lu &lt;yhlu.kernel@gmail.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'x86/x2apic' into x86/core</title>
<updated>2008-09-05T07:21:21+00:00</updated>
<author>
<name>Ingo Molnar</name>
<email>mingo@elte.hu</email>
</author>
<published>2008-09-05T07:21:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=9042763808c5285a1a61b45b0fe98a710a4c903c'/>
<id>9042763808c5285a1a61b45b0fe98a710a4c903c</id>
<content type='text'>
Conflicts:
	arch/x86/kernel/cpu/common_64.c

Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Conflicts:
	arch/x86/kernel/cpu/common_64.c

Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: remove cpu_vendor_dev</title>
<updated>2008-09-04T19:09:45+00:00</updated>
<author>
<name>Yinghai Lu</name>
<email>yhlu.kernel@gmail.com</email>
</author>
<published>2008-09-04T19:09:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=10a434fcb23a57c385177a0086955fae01003f64'/>
<id>10a434fcb23a57c385177a0086955fae01003f64</id>
<content type='text'>
1. add c_x86_vendor into cpu_dev
2. change cpu_devs to static
3. check c_x86_vendor before put that cpu_dev into array
4. remove alignment for 64bit
5. order the sequence in cpu_devs according to link sequence...
   so could put intel at first, then amd...

Signed-off-by: Yinghai Lu &lt;yhlu.kernel@gmail.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
1. add c_x86_vendor into cpu_dev
2. change cpu_devs to static
3. check c_x86_vendor before put that cpu_dev into array
4. remove alignment for 64bit
5. order the sequence in cpu_devs according to link sequence...
   so could put intel at first, then amd...

Signed-off-by: Yinghai Lu &lt;yhlu.kernel@gmail.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: use cpuid vector 0xb when available for detecting cpu topology</title>
<updated>2008-08-23T15:47:10+00:00</updated>
<author>
<name>Suresh Siddha</name>
<email>suresh.b.siddha@intel.com</email>
</author>
<published>2008-08-23T15:47:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=bbb65d2d365efe9951290e61678dcf81ec60add4'/>
<id>bbb65d2d365efe9951290e61678dcf81ec60add4</id>
<content type='text'>
cpuid leaf 0xb provides extended topology enumeration. This interface provides
the 32-bit x2APIC id of the logical processor and it also provides a new
mechanism to detect SMT and core siblings (which provides increased
addressability).

Signed-off-by: Suresh Siddha &lt;suresh.b.siddha@intel.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
cpuid leaf 0xb provides extended topology enumeration. This interface provides
the 32-bit x2APIC id of the logical processor and it also provides a new
mechanism to detect SMT and core siblings (which provides increased
addressability).

Signed-off-by: Suresh Siddha &lt;suresh.b.siddha@intel.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: move cmpxchg fallbacks to a generic place</title>
<updated>2008-08-18T14:05:47+00:00</updated>
<author>
<name>Thomas Petazzoni</name>
<email>thomas.petazzoni@free-electrons.com</email>
</author>
<published>2008-08-18T10:33:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=774400a3ba23b63f4de39e67ce6c4e48935809dc'/>
<id>774400a3ba23b63f4de39e67ce6c4e48935809dc</id>
<content type='text'>
arch/x86/kernel/cpu/intel.c defines a few fallback functions
(cmpxchg_*()) that are used when the CPU doesn't support cmpxchg
and/or cmpxchg64 natively. However, while defined in an Intel-specific
file, these functions are also used for CPUs from other vendors when
they don't support cmpxchg and/or cmpxchg64. This breaks the
compilation when support for Intel CPUs is disabled.

This patch moves these functions to a new
arch/x86/kernel/cpu/cmpxchg.c file, unconditionally compiled when
X86_32 is enabled.

Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
Cc: michael@free-electrons.com
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
arch/x86/kernel/cpu/intel.c defines a few fallback functions
(cmpxchg_*()) that are used when the CPU doesn't support cmpxchg
and/or cmpxchg64 natively. However, while defined in an Intel-specific
file, these functions are also used for CPUs from other vendors when
they don't support cmpxchg and/or cmpxchg64. This breaks the
compilation when support for Intel CPUs is disabled.

This patch moves these functions to a new
arch/x86/kernel/cpu/cmpxchg.c file, unconditionally compiled when
X86_32 is enabled.

Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
Cc: michael@free-electrons.com
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</pre>
</div>
</content>
</entry>
</feed>
