<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/arch/x86/kernel/amd_nb.c, branch v5.5</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>x86/amd_nb: Add PCI device IDs for family 17h, model 70h</title>
<updated>2019-09-03T19:47:17+00:00</updated>
<author>
<name>Marcel Bocu</name>
<email>marcel.p.bocu@gmail.com</email>
</author>
<published>2019-07-22T17:45:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=af4e1c5eca95bed1192d8dc45c8ed63aea2209e8'/>
<id>af4e1c5eca95bed1192d8dc45c8ed63aea2209e8</id>
<content type='text'>
The AMD Ryzen gen 3 processors came with a different PCI IDs for the
function 3 &amp; 4 which are used to access the SMN interface. The root
PCI address however remained at the same address as the model 30h.

Adding the F3/F4 PCI IDs respectively to the misc and link ids appear
to be sufficient for k10temp, so let's add them and follow up on the
patch if other functions need more tweaking.

Vicki Pfau sent an identical patch after I checked that no-one had
written this patch. I would have been happy about dropping my patch but
unlike for his patch series, I had already Cc:ed the x86 people and
they already reviewed the changes. Since Vicki has not answered to
any email after his initial series, let's assume she is on vacation
and let's avoid duplication of reviews from the maintainers and merge
my series. To acknowledge Vicki's anteriority, I added her S-o-b to
the patch.

v2, suggested by Guenter Roeck and Brian Woods:
 - rename from 71h to 70h

Signed-off-by: Vicki Pfau &lt;vi@endrift.com&gt;
Signed-off-by: Marcel Bocu &lt;marcel.p.bocu@gmail.com&gt;
Tested-by: Marcel Bocu &lt;marcel.p.bocu@gmail.com&gt;
Acked-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Acked-by: Brian Woods &lt;brian.woods@amd.com&gt;
Acked-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;	# pci_ids.h

Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Ingo Molnar &lt;mingo@redhat.com&gt;
Cc: Borislav Petkov &lt;bp@alien8.de&gt;
Cc: "H. Peter Anvin" &lt;hpa@zytor.com&gt;
Cc: x86@kernel.org
Cc: "Woods, Brian" &lt;Brian.Woods@amd.com&gt;
Cc: Clemens Ladisch &lt;clemens@ladisch.de&gt;
Cc: Jean Delvare &lt;jdelvare@suse.com&gt;
Cc: Guenter Roeck &lt;linux@roeck-us.net&gt;
Cc: linux-hwmon@vger.kernel.org
Link: https://lore.kernel.org/r/20190722174510.2179-1-marcel.p.bocu@gmail.com
Signed-off-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The AMD Ryzen gen 3 processors came with a different PCI IDs for the
function 3 &amp; 4 which are used to access the SMN interface. The root
PCI address however remained at the same address as the model 30h.

Adding the F3/F4 PCI IDs respectively to the misc and link ids appear
to be sufficient for k10temp, so let's add them and follow up on the
patch if other functions need more tweaking.

Vicki Pfau sent an identical patch after I checked that no-one had
written this patch. I would have been happy about dropping my patch but
unlike for his patch series, I had already Cc:ed the x86 people and
they already reviewed the changes. Since Vicki has not answered to
any email after his initial series, let's assume she is on vacation
and let's avoid duplication of reviews from the maintainers and merge
my series. To acknowledge Vicki's anteriority, I added her S-o-b to
the patch.

v2, suggested by Guenter Roeck and Brian Woods:
 - rename from 71h to 70h

Signed-off-by: Vicki Pfau &lt;vi@endrift.com&gt;
Signed-off-by: Marcel Bocu &lt;marcel.p.bocu@gmail.com&gt;
Tested-by: Marcel Bocu &lt;marcel.p.bocu@gmail.com&gt;
Acked-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Acked-by: Brian Woods &lt;brian.woods@amd.com&gt;
Acked-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;	# pci_ids.h

Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Ingo Molnar &lt;mingo@redhat.com&gt;
Cc: Borislav Petkov &lt;bp@alien8.de&gt;
Cc: "H. Peter Anvin" &lt;hpa@zytor.com&gt;
Cc: x86@kernel.org
Cc: "Woods, Brian" &lt;Brian.Woods@amd.com&gt;
Cc: Clemens Ladisch &lt;clemens@ladisch.de&gt;
Cc: Jean Delvare &lt;jdelvare@suse.com&gt;
Cc: Guenter Roeck &lt;linux@roeck-us.net&gt;
Cc: linux-hwmon@vger.kernel.org
Link: https://lore.kernel.org/r/20190722174510.2179-1-marcel.p.bocu@gmail.com
Signed-off-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'x86-cleanups-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip</title>
<updated>2019-07-09T00:27:24+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2019-07-09T00:27:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=5b7a2095232d026d4537c4be54040c0f10525b5b'/>
<id>5b7a2095232d026d4537c4be54040c0f10525b5b</id>
<content type='text'>
Pull x86 cleanups from Ingo Molnar:
 "Misc small cleanups: removal of superfluous code and coding style
  cleanups mostly"

* 'x86-cleanups-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/kexec: Make variable static and config dependent
  x86/defconfigs: Remove useless UEVENT_HELPER_PATH
  x86/amd_nb: Make hygon_nb_misc_ids static
  x86/tsc: Move inline keyword to the beginning of function declarations
  x86/io_delay: Define IO_DELAY macros in C instead of Kconfig
  x86/io_delay: Break instead of fallthrough in switch statement
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull x86 cleanups from Ingo Molnar:
 "Misc small cleanups: removal of superfluous code and coding style
  cleanups mostly"

* 'x86-cleanups-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/kexec: Make variable static and config dependent
  x86/defconfigs: Remove useless UEVENT_HELPER_PATH
  x86/amd_nb: Make hygon_nb_misc_ids static
  x86/tsc: Move inline keyword to the beginning of function declarations
  x86/io_delay: Define IO_DELAY macros in C instead of Kconfig
  x86/io_delay: Break instead of fallthrough in switch statement
</pre>
</div>
</content>
</entry>
<entry>
<title>treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 477</title>
<updated>2019-06-19T15:09:51+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2019-06-04T08:11:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=f9724741de5bcc2f788a1abfd104b162533c8f31'/>
<id>f9724741de5bcc2f788a1abfd104b162533c8f31</id>
<content type='text'>
Based on 1 normalized pattern(s):

  subject to gplv2

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 1 file(s).

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Enrico Weigelt &lt;info@metux.net&gt;
Reviewed-by: Allison Randal &lt;allison@lohutok.net&gt;
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081204.018005938@linutronix.de
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Based on 1 normalized pattern(s):

  subject to gplv2

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 1 file(s).

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Enrico Weigelt &lt;info@metux.net&gt;
Reviewed-by: Allison Randal &lt;allison@lohutok.net&gt;
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081204.018005938@linutronix.de
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86/amd_nb: Make hygon_nb_misc_ids static</title>
<updated>2019-06-14T18:25:58+00:00</updated>
<author>
<name>YueHaibing</name>
<email>yuehaibing@huawei.com</email>
</author>
<published>2019-06-14T15:54:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=025e32048f39e24d8ddf9369d679644ea2bdcce6'/>
<id>025e32048f39e24d8ddf9369d679644ea2bdcce6</id>
<content type='text'>
Fix the following sparse warning:

  arch/x86/kernel/amd_nb.c:74:28: warning:
    symbol 'hygon_nb_misc_ids' was not declared. Should it be static?

Reported-by: Hulk Robot &lt;hulkci@huawei.com&gt;
Signed-off-by: YueHaibing &lt;yuehaibing@huawei.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Cc: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Cc: Brian Woods &lt;Brian.Woods@amd.com&gt;
Cc: Guenter Roeck &lt;linux@roeck-us.net&gt;
Cc: "H. Peter Anvin" &lt;hpa@zytor.com&gt;
Cc: Ingo Molnar &lt;mingo@redhat.com&gt;
Cc: Pu Wen &lt;puwen@hygon.cn&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: x86-ml &lt;x86@kernel.org&gt;
Link: https://lkml.kernel.org/r/20190614155441.22076-1-yuehaibing@huawei.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Fix the following sparse warning:

  arch/x86/kernel/amd_nb.c:74:28: warning:
    symbol 'hygon_nb_misc_ids' was not declared. Should it be static?

Reported-by: Hulk Robot &lt;hulkci@huawei.com&gt;
Signed-off-by: YueHaibing &lt;yuehaibing@huawei.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Cc: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Cc: Brian Woods &lt;Brian.Woods@amd.com&gt;
Cc: Guenter Roeck &lt;linux@roeck-us.net&gt;
Cc: "H. Peter Anvin" &lt;hpa@zytor.com&gt;
Cc: Ingo Molnar &lt;mingo@redhat.com&gt;
Cc: Pu Wen &lt;puwen@hygon.cn&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: x86-ml &lt;x86@kernel.org&gt;
Link: https://lkml.kernel.org/r/20190614155441.22076-1-yuehaibing@huawei.com
</pre>
</div>
</content>
</entry>
<entry>
<title>x86/amd_nb: Add PCI device IDs for family 17h, model 30h</title>
<updated>2018-11-07T20:36:09+00:00</updated>
<author>
<name>Woods, Brian</name>
<email>Brian.Woods@amd.com</email>
</author>
<published>2018-11-06T20:08:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=be3518a16ef270e3b030a6ae96055f83f51bd3dd'/>
<id>be3518a16ef270e3b030a6ae96055f83f51bd3dd</id>
<content type='text'>
Add the PCI device IDs for family 17h model 30h, since they are needed
for accessing various registers via the data fabric/SMN interface.

Signed-off-by: Brian Woods &lt;brian.woods@amd.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
CC: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
CC: Clemens Ladisch &lt;clemens@ladisch.de&gt;
CC: Guenter Roeck &lt;linux@roeck-us.net&gt;
CC: "H. Peter Anvin" &lt;hpa@zytor.com&gt;
CC: Ingo Molnar &lt;mingo@redhat.com&gt;
CC: Jean Delvare &lt;jdelvare@suse.com&gt;
CC: Jia Zhang &lt;qianyue.zj@alibaba-inc.com&gt;
CC: &lt;linux-hwmon@vger.kernel.org&gt;
CC: &lt;linux-pci@vger.kernel.org&gt;
CC: Pu Wen &lt;puwen@hygon.cn&gt;
CC: Thomas Gleixner &lt;tglx@linutronix.de&gt;
CC: x86-ml &lt;x86@kernel.org&gt;
Link: http://lkml.kernel.org/r/20181106200754.60722-4-brian.woods@amd.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add the PCI device IDs for family 17h model 30h, since they are needed
for accessing various registers via the data fabric/SMN interface.

Signed-off-by: Brian Woods &lt;brian.woods@amd.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
CC: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
CC: Clemens Ladisch &lt;clemens@ladisch.de&gt;
CC: Guenter Roeck &lt;linux@roeck-us.net&gt;
CC: "H. Peter Anvin" &lt;hpa@zytor.com&gt;
CC: Ingo Molnar &lt;mingo@redhat.com&gt;
CC: Jean Delvare &lt;jdelvare@suse.com&gt;
CC: Jia Zhang &lt;qianyue.zj@alibaba-inc.com&gt;
CC: &lt;linux-hwmon@vger.kernel.org&gt;
CC: &lt;linux-pci@vger.kernel.org&gt;
CC: Pu Wen &lt;puwen@hygon.cn&gt;
CC: Thomas Gleixner &lt;tglx@linutronix.de&gt;
CC: x86-ml &lt;x86@kernel.org&gt;
Link: http://lkml.kernel.org/r/20181106200754.60722-4-brian.woods@amd.com
</pre>
</div>
</content>
</entry>
<entry>
<title>x86/amd_nb: Add support for newer PCI topologies</title>
<updated>2018-11-07T20:28:29+00:00</updated>
<author>
<name>Woods, Brian</name>
<email>Brian.Woods@amd.com</email>
</author>
<published>2018-11-06T20:08:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=556e4c62baffa71e2045a298379db7e57dd47f3d'/>
<id>556e4c62baffa71e2045a298379db7e57dd47f3d</id>
<content type='text'>
Add support for new processors which have multiple PCI root complexes
per data fabric/system management network interface.  If there are (N)
multiple PCI roots per DF/SMN interface, then the PCI roots are
redundant (as far as SMN/DF access goes).  For each DF/SMN interface:
map to the first available PCI root and skip the next N-1 PCI roots so
the following DF/SMN interface get mapped to a correct PCI root.

Ex:
DF/SMN 0 -&gt; 60
	    40
	    20
	    00
DF/SMN 1 -&gt; e0
	    c0
	    a0
	    80

Signed-off-by: Brian Woods &lt;brian.woods@amd.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
CC: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
CC: Clemens Ladisch &lt;clemens@ladisch.de&gt;
CC: Guenter Roeck &lt;linux@roeck-us.net&gt;
CC: "H. Peter Anvin" &lt;hpa@zytor.com&gt;
CC: Ingo Molnar &lt;mingo@redhat.com&gt;
CC: Jean Delvare &lt;jdelvare@suse.com&gt;
CC: Jia Zhang &lt;qianyue.zj@alibaba-inc.com&gt;
CC: &lt;linux-hwmon@vger.kernel.org&gt;
CC: &lt;linux-pci@vger.kernel.org&gt;
CC: Pu Wen &lt;puwen@hygon.cn&gt;
CC: Thomas Gleixner &lt;tglx@linutronix.de&gt;
CC: x86-ml &lt;x86@kernel.org&gt;
Link: http://lkml.kernel.org/r/20181106200754.60722-3-brian.woods@amd.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add support for new processors which have multiple PCI root complexes
per data fabric/system management network interface.  If there are (N)
multiple PCI roots per DF/SMN interface, then the PCI roots are
redundant (as far as SMN/DF access goes).  For each DF/SMN interface:
map to the first available PCI root and skip the next N-1 PCI roots so
the following DF/SMN interface get mapped to a correct PCI root.

Ex:
DF/SMN 0 -&gt; 60
	    40
	    20
	    00
DF/SMN 1 -&gt; e0
	    c0
	    a0
	    80

Signed-off-by: Brian Woods &lt;brian.woods@amd.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
CC: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
CC: Clemens Ladisch &lt;clemens@ladisch.de&gt;
CC: Guenter Roeck &lt;linux@roeck-us.net&gt;
CC: "H. Peter Anvin" &lt;hpa@zytor.com&gt;
CC: Ingo Molnar &lt;mingo@redhat.com&gt;
CC: Jean Delvare &lt;jdelvare@suse.com&gt;
CC: Jia Zhang &lt;qianyue.zj@alibaba-inc.com&gt;
CC: &lt;linux-hwmon@vger.kernel.org&gt;
CC: &lt;linux-pci@vger.kernel.org&gt;
CC: Pu Wen &lt;puwen@hygon.cn&gt;
CC: Thomas Gleixner &lt;tglx@linutronix.de&gt;
CC: x86-ml &lt;x86@kernel.org&gt;
Link: http://lkml.kernel.org/r/20181106200754.60722-3-brian.woods@amd.com
</pre>
</div>
</content>
</entry>
<entry>
<title>hwmon/k10temp, x86/amd_nb: Consolidate shared device IDs</title>
<updated>2018-11-07T20:28:04+00:00</updated>
<author>
<name>Woods, Brian</name>
<email>Brian.Woods@amd.com</email>
</author>
<published>2018-11-06T20:08:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=dedf7dce4cec5c0abe69f4fa6938d5100398220b'/>
<id>dedf7dce4cec5c0abe69f4fa6938d5100398220b</id>
<content type='text'>
Consolidate shared PCI_DEVICE_IDs that were scattered through k10temp
and amd_nb, and move them into pci_ids.

Signed-off-by: Brian Woods &lt;brian.woods@amd.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Acked-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
CC: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
CC: Clemens Ladisch &lt;clemens@ladisch.de&gt;
CC: "H. Peter Anvin" &lt;hpa@zytor.com&gt;
CC: Ingo Molnar &lt;mingo@redhat.com&gt;
CC: Jean Delvare &lt;jdelvare@suse.com&gt;
CC: Jia Zhang &lt;qianyue.zj@alibaba-inc.com&gt;
CC: &lt;linux-hwmon@vger.kernel.org&gt;
CC: &lt;linux-pci@vger.kernel.org&gt;
CC: Pu Wen &lt;puwen@hygon.cn&gt;
CC: Thomas Gleixner &lt;tglx@linutronix.de&gt;
CC: x86-ml &lt;x86@kernel.org&gt;
Link: http://lkml.kernel.org/r/20181106200754.60722-2-brian.woods@amd.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Consolidate shared PCI_DEVICE_IDs that were scattered through k10temp
and amd_nb, and move them into pci_ids.

Signed-off-by: Brian Woods &lt;brian.woods@amd.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Acked-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
CC: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
CC: Clemens Ladisch &lt;clemens@ladisch.de&gt;
CC: "H. Peter Anvin" &lt;hpa@zytor.com&gt;
CC: Ingo Molnar &lt;mingo@redhat.com&gt;
CC: Jean Delvare &lt;jdelvare@suse.com&gt;
CC: Jia Zhang &lt;qianyue.zj@alibaba-inc.com&gt;
CC: &lt;linux-hwmon@vger.kernel.org&gt;
CC: &lt;linux-pci@vger.kernel.org&gt;
CC: Pu Wen &lt;puwen@hygon.cn&gt;
CC: Thomas Gleixner &lt;tglx@linutronix.de&gt;
CC: x86-ml &lt;x86@kernel.org&gt;
Link: http://lkml.kernel.org/r/20181106200754.60722-2-brian.woods@amd.com
</pre>
</div>
</content>
</entry>
<entry>
<title>x86/pci, x86/amd_nb: Add Hygon Dhyana support to PCI and northbridge</title>
<updated>2018-09-27T16:28:58+00:00</updated>
<author>
<name>Pu Wen</name>
<email>puwen@hygon.cn</email>
</author>
<published>2018-09-25T14:46:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=c6babb5806b77c6ca7078c3487bb0a29704a4e38'/>
<id>c6babb5806b77c6ca7078c3487bb0a29704a4e38</id>
<content type='text'>
Hygon's PCI vendor ID is 0x1d94, and there are PCI devices
0x1450/0x1463/0x1464 for the host bridge on the Hygon Dhyana platform.
Add Hygon Dhyana support to the PCI and northbridge subsystems by using
the code path of AMD family 17h.

 [ bp: Massage commit message, sort local vars into reverse xmas tree
   order and move the amd_northbridges.num check up. ]

Signed-off-by: Pu Wen &lt;puwen@hygon.cn&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Acked-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;	# pci_ids.h
Cc: tglx@linutronix.de
Cc: mingo@redhat.com
Cc: hpa@zytor.com
Cc: x86@kernel.org
Cc: thomas.lendacky@amd.com
Cc: helgaas@kernel.org
Cc: linux-pci@vger.kernel.org
Link: https://lkml.kernel.org/r/5f8877bd413f2ea0833378dd5454df0720e1c0df.1537885177.git.puwen@hygon.cn
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Hygon's PCI vendor ID is 0x1d94, and there are PCI devices
0x1450/0x1463/0x1464 for the host bridge on the Hygon Dhyana platform.
Add Hygon Dhyana support to the PCI and northbridge subsystems by using
the code path of AMD family 17h.

 [ bp: Massage commit message, sort local vars into reverse xmas tree
   order and move the amd_northbridges.num check up. ]

Signed-off-by: Pu Wen &lt;puwen@hygon.cn&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Acked-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;	# pci_ids.h
Cc: tglx@linutronix.de
Cc: mingo@redhat.com
Cc: hpa@zytor.com
Cc: x86@kernel.org
Cc: thomas.lendacky@amd.com
Cc: helgaas@kernel.org
Cc: linux-pci@vger.kernel.org
Link: https://lkml.kernel.org/r/5f8877bd413f2ea0833378dd5454df0720e1c0df.1537885177.git.puwen@hygon.cn
</pre>
</div>
</content>
</entry>
<entry>
<title>x86/amd_nb: Check vendor in AMD-only functions</title>
<updated>2018-09-27T16:28:58+00:00</updated>
<author>
<name>Pu Wen</name>
<email>puwen@hygon.cn</email>
</author>
<published>2018-09-25T14:45:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=b7a5cb4f220e78490735b2b984ad29b7d8e612a9'/>
<id>b7a5cb4f220e78490735b2b984ad29b7d8e612a9</id>
<content type='text'>
Exit early in functions which are meant to run on AMD only but which get
run on different vendor (VMs, etc).

 [ bp: rewrite commit message. ]

Signed-off-by: Pu Wen &lt;puwen@hygon.cn&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Cc: bhelgaas@google.com
Cc: tglx@linutronix.de
Cc: mingo@redhat.com
Cc: hpa@zytor.com
Cc: x86@kernel.org
Cc: thomas.lendacky@amd.com
Cc: helgaas@kernel.org
Link: https://lkml.kernel.org/r/487d8078708baedaf63eb00a82251e228b58f1c2.1537885177.git.puwen@hygon.cn
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Exit early in functions which are meant to run on AMD only but which get
run on different vendor (VMs, etc).

 [ bp: rewrite commit message. ]

Signed-off-by: Pu Wen &lt;puwen@hygon.cn&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Cc: bhelgaas@google.com
Cc: tglx@linutronix.de
Cc: mingo@redhat.com
Cc: hpa@zytor.com
Cc: x86@kernel.org
Cc: thomas.lendacky@amd.com
Cc: helgaas@kernel.org
Link: https://lkml.kernel.org/r/487d8078708baedaf63eb00a82251e228b58f1c2.1537885177.git.puwen@hygon.cn
</pre>
</div>
</content>
</entry>
<entry>
<title>x86/amd_nb: Add support for Raven Ridge CPUs</title>
<updated>2018-05-13T16:00:27+00:00</updated>
<author>
<name>Guenter Roeck</name>
<email>linux@roeck-us.net</email>
</author>
<published>2018-05-04T20:01:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=f9bc6b2dd9cf025f827f471769e1d88b527bfb91'/>
<id>f9bc6b2dd9cf025f827f471769e1d88b527bfb91</id>
<content type='text'>
Add Raven Ridge root bridge and data fabric PCI IDs.
This is required for amd_pci_dev_to_node_id() and amd_smn_read().

Cc: stable@vger.kernel.org # v4.16+
Tested-by: Gabriel Craciunescu &lt;nix.or.die@gmail.com&gt;
Acked-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add Raven Ridge root bridge and data fabric PCI IDs.
This is required for amd_pci_dev_to_node_id() and amd_smn_read().

Cc: stable@vger.kernel.org # v4.16+
Tested-by: Gabriel Craciunescu &lt;nix.or.die@gmail.com&gt;
Acked-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
</pre>
</div>
</content>
</entry>
</feed>
