<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/arch/x86/include/asm/processor.h, branch v2.6.37</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>Merge branch 'x86-idle-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip</title>
<updated>2010-10-21T20:45:38+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2010-10-21T20:45:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=2a8b67fb72c4c4bc15fe8095e3ed613789c8b82f'/>
<id>2a8b67fb72c4c4bc15fe8095e3ed613789c8b82f</id>
<content type='text'>
* 'x86-idle-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  x86, hotplug: In the MWAIT case of play_dead, CLFLUSH the cache line
  x86, hotplug: Move WBINVD back outside the play_dead loop
  x86, hotplug: Use mwait to offline a processor, fix the legacy case
  x86, mwait: Move mwait constants to a common header file
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
* 'x86-idle-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  x86, hotplug: In the MWAIT case of play_dead, CLFLUSH the cache line
  x86, hotplug: Move WBINVD back outside the play_dead loop
  x86, hotplug: Use mwait to offline a processor, fix the legacy case
  x86, mwait: Move mwait constants to a common header file
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'x86-fpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip</title>
<updated>2010-10-21T20:34:32+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2010-10-21T20:34:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=b6f7e38dbb310557fe890b04b1a376c93f638c3b'/>
<id>b6f7e38dbb310557fe890b04b1a376c93f638c3b</id>
<content type='text'>
* 'x86-fpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  x86, fpu: Merge fpu_save_init()
  x86-32, fpu: Rewrite fpu_save_init()
  x86, fpu: Remove PSHUFB_XMM5_* macros
  x86, fpu: Remove unnecessary ifdefs from i387 code.
  x86-32, fpu: Remove math_emulate stub
  x86-64, fpu: Simplify constraints for fxsave/fxtstor
  x86-64, fpu: Fix %cs value in convert_from_fxsr()
  x86-64, fpu: Disable preemption when using TS_USEDFPU
  x86, fpu: Merge __save_init_fpu()
  x86, fpu: Merge tolerant_fwait()
  x86, fpu: Merge fpu_init()
  x86: Use correct type for %cr4
  x86, xsave: Disable xsave in i387 emulation mode

Fixed up fxsaveq-induced conflict in arch/x86/include/asm/i387.h
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
* 'x86-fpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  x86, fpu: Merge fpu_save_init()
  x86-32, fpu: Rewrite fpu_save_init()
  x86, fpu: Remove PSHUFB_XMM5_* macros
  x86, fpu: Remove unnecessary ifdefs from i387 code.
  x86-32, fpu: Remove math_emulate stub
  x86-64, fpu: Simplify constraints for fxsave/fxtstor
  x86-64, fpu: Fix %cs value in convert_from_fxsr()
  x86-64, fpu: Disable preemption when using TS_USEDFPU
  x86, fpu: Merge __save_init_fpu()
  x86, fpu: Merge tolerant_fwait()
  x86, fpu: Merge fpu_init()
  x86: Use correct type for %cr4
  x86, xsave: Disable xsave in i387 emulation mode

Fixed up fxsaveq-induced conflict in arch/x86/include/asm/i387.h
</pre>
</div>
</content>
</entry>
<entry>
<title>x86, amd: Extract compute unit information for AMD CPUs</title>
<updated>2010-10-01T23:18:32+00:00</updated>
<author>
<name>Andreas Herrmann</name>
<email>andreas.herrmann3@amd.com</email>
</author>
<published>2010-09-30T12:38:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=6057b4d331f19a3ea51aec463ea7839c128b3227'/>
<id>6057b4d331f19a3ea51aec463ea7839c128b3227</id>
<content type='text'>
Get compute unit information from CPUID Fn8000_001E_EBX.
(See AMD CPUID Specification - publication # 25481, revision 2.34,
September 2010.)

Note that each core on a compute unit still has a core_id of its own.

Signed-off-by: Andreas Herrmann &lt;andreas.herrmann3@amd.com&gt;
LKML-Reference: &lt;20100930123857.GE20545@loge.amd.com&gt;
Signed-off-by: H. Peter Anvin &lt;hpa@linux.intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Get compute unit information from CPUID Fn8000_001E_EBX.
(See AMD CPUID Specification - publication # 25481, revision 2.34,
September 2010.)

Note that each core on a compute unit still has a core_id of its own.

Signed-off-by: Andreas Herrmann &lt;andreas.herrmann3@amd.com&gt;
LKML-Reference: &lt;20100930123857.GE20545@loge.amd.com&gt;
Signed-off-by: H. Peter Anvin &lt;hpa@linux.intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86, hotplug: Use mwait to offline a processor, fix the legacy case</title>
<updated>2010-09-17T22:39:11+00:00</updated>
<author>
<name>H. Peter Anvin</name>
<email>hpa@linux.intel.com</email>
</author>
<published>2010-09-17T22:39:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=ea53069231f9317062910d6e772cca4ce93de8c8'/>
<id>ea53069231f9317062910d6e772cca4ce93de8c8</id>
<content type='text'>
The code in native_play_dead() has a number of problems:

1. We should use MWAIT when available, to put ourselves into a deeper
   sleep state.
2. We use the existence of CLFLUSH to determine if WBINVD is safe, but
   that is totally bogus -- WBINVD is 486+, whereas CLFLUSH is a much
   later addition.
3. We should do WBINVD inside the loop, just in case of something like
   setting an A bit on page tables.  Pointed out by Arjan van de Ven.

This code is based in part of a previous patch by Venki Pallipadi, but
unlike that patch this one keeps all the detection code local instead
of pre-caching a bunch of information.  We're shutting down the CPU;
there is absolutely no hurry.

This patch moves all the code to C and deletes the global
wbinvd_halt() which is broken anyway.

Originally-by: Venkatesh Pallipadi &lt;venkatesh.pallipadi@intel.com&gt;
Signed-off-by: H. Peter Anvin &lt;hpa@linux.intel.com&gt;
Reviewed-by: Arjan van de Ven &lt;arjan@linux.intel.com&gt;
Cc: Len Brown &lt;lenb@kernel.org&gt;
Cc: Venkatesh Pallipadi &lt;venki@google.com&gt;
Cc: Peter Zijlstra &lt;a.p.zijlstra@chello.hl&gt;
LKML-Reference: &lt;20090522232230.162239000@intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The code in native_play_dead() has a number of problems:

1. We should use MWAIT when available, to put ourselves into a deeper
   sleep state.
2. We use the existence of CLFLUSH to determine if WBINVD is safe, but
   that is totally bogus -- WBINVD is 486+, whereas CLFLUSH is a much
   later addition.
3. We should do WBINVD inside the loop, just in case of something like
   setting an A bit on page tables.  Pointed out by Arjan van de Ven.

This code is based in part of a previous patch by Venki Pallipadi, but
unlike that patch this one keeps all the detection code local instead
of pre-caching a bunch of information.  We're shutting down the CPU;
there is absolutely no hurry.

This patch moves all the code to C and deletes the global
wbinvd_halt() which is broken anyway.

Originally-by: Venkatesh Pallipadi &lt;venkatesh.pallipadi@intel.com&gt;
Signed-off-by: H. Peter Anvin &lt;hpa@linux.intel.com&gt;
Reviewed-by: Arjan van de Ven &lt;arjan@linux.intel.com&gt;
Cc: Len Brown &lt;lenb@kernel.org&gt;
Cc: Venkatesh Pallipadi &lt;venki@google.com&gt;
Cc: Peter Zijlstra &lt;a.p.zijlstra@chello.hl&gt;
LKML-Reference: &lt;20090522232230.162239000@intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: Use correct type for %cr4</title>
<updated>2010-09-09T21:16:13+00:00</updated>
<author>
<name>Brian Gerst</name>
<email>brgerst@gmail.com</email>
</author>
<published>2010-09-04T01:17:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=2df7a6e9e8e67c19e5fe2eac3f2d2223b7bb4a7b'/>
<id>2df7a6e9e8e67c19e5fe2eac3f2d2223b7bb4a7b</id>
<content type='text'>
%cr4 is 64-bit in 64-bit mode (although the upper 32-bits are currently reserved).
Use unsigned long for the temporary variable to get the right size.

Signed-off-by: Brian Gerst &lt;brgerst@gmail.com&gt;
Acked-by: Pekka Enberg &lt;penberg@kernel.org&gt;
Cc: Suresh Siddha &lt;suresh.b.siddha@intel.com&gt;
LKML-Reference: &lt;1283563039-3466-2-git-send-email-brgerst@gmail.com&gt;
Signed-off-by: H. Peter Anvin &lt;hpa@linux.intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
%cr4 is 64-bit in 64-bit mode (although the upper 32-bits are currently reserved).
Use unsigned long for the temporary variable to get the right size.

Signed-off-by: Brian Gerst &lt;brgerst@gmail.com&gt;
Acked-by: Pekka Enberg &lt;penberg@kernel.org&gt;
Cc: Suresh Siddha &lt;suresh.b.siddha@intel.com&gt;
LKML-Reference: &lt;1283563039-3466-2-git-send-email-brgerst@gmail.com&gt;
Signed-off-by: H. Peter Anvin &lt;hpa@linux.intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: Fix keeping track of AMD C1E</title>
<updated>2010-08-02T15:45:56+00:00</updated>
<author>
<name>Michal Schmidt</name>
<email>mschmidt@redhat.com</email>
</author>
<published>2010-07-27T16:53:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=e8c534ec068af1a0845aceda373a9bfd2de62030'/>
<id>e8c534ec068af1a0845aceda373a9bfd2de62030</id>
<content type='text'>
Accomodate the original C1E-aware idle routine to the different times
during boot when the BIOS enables C1E. While at it, remove the synthetic
CPUID flag in favor of a single global setting which denotes C1E status
on the system.

[ hpa: changed c1e_enabled to be a bool; clarified cpu bit 3:21 comment ]

Signed-off-by: Michal Schmidt &lt;mschmidt@redhat.com&gt;
LKML-Reference: &lt;20100727165335.GA11630@aftab&gt;
Signed-off-by: Borislav Petkov &lt;borislav.petkov@amd.com&gt;
Signed-off-by: H. Peter Anvin &lt;hpa@zytor.com&gt;
Acked-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Accomodate the original C1E-aware idle routine to the different times
during boot when the BIOS enables C1E. While at it, remove the synthetic
CPUID flag in favor of a single global setting which denotes C1E status
on the system.

[ hpa: changed c1e_enabled to be a bool; clarified cpu bit 3:21 comment ]

Signed-off-by: Michal Schmidt &lt;mschmidt@redhat.com&gt;
LKML-Reference: &lt;20100727165335.GA11630@aftab&gt;
Signed-off-by: Borislav Petkov &lt;borislav.petkov@amd.com&gt;
Signed-off-by: H. Peter Anvin &lt;hpa@zytor.com&gt;
Acked-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86, cpu: Use AMD errata checking framework for erratum 383</title>
<updated>2010-07-28T20:12:31+00:00</updated>
<author>
<name>Hans Rosenfeld</name>
<email>hans.rosenfeld@amd.com</email>
</author>
<published>2010-07-28T17:09:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=1be85a6d93f4207d8c2c6238c4a96895e28cefba'/>
<id>1be85a6d93f4207d8c2c6238c4a96895e28cefba</id>
<content type='text'>
Use the AMD errata checking framework instead of open-coding the test.

Signed-off-by: Hans Rosenfeld &lt;hans.rosenfeld@amd.com&gt;
LKML-Reference: &lt;1280336972-865982-3-git-send-email-hans.rosenfeld@amd.com&gt;
Signed-off-by: H. Peter Anvin &lt;hpa@linux.intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Use the AMD errata checking framework instead of open-coding the test.

Signed-off-by: Hans Rosenfeld &lt;hans.rosenfeld@amd.com&gt;
LKML-Reference: &lt;1280336972-865982-3-git-send-email-hans.rosenfeld@amd.com&gt;
Signed-off-by: H. Peter Anvin &lt;hpa@linux.intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86, cpu: Clean up AMD erratum 400 workaround</title>
<updated>2010-07-28T20:12:11+00:00</updated>
<author>
<name>Hans Rosenfeld</name>
<email>hans.rosenfeld@amd.com</email>
</author>
<published>2010-07-28T17:09:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=9d8888c2a214aece2494a49e699a097c2ba9498b'/>
<id>9d8888c2a214aece2494a49e699a097c2ba9498b</id>
<content type='text'>
Remove check_c1e_idle() and use the new AMD errata checking framework
instead.

Signed-off-by: Hans Rosenfeld &lt;hans.rosenfeld@amd.com&gt;
LKML-Reference: &lt;1280336972-865982-2-git-send-email-hans.rosenfeld@amd.com&gt;
Signed-off-by: H. Peter Anvin &lt;hpa@linux.intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Remove check_c1e_idle() and use the new AMD errata checking framework
instead.

Signed-off-by: Hans Rosenfeld &lt;hans.rosenfeld@amd.com&gt;
LKML-Reference: &lt;1280336972-865982-2-git-send-email-hans.rosenfeld@amd.com&gt;
Signed-off-by: H. Peter Anvin &lt;hpa@linux.intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86, cpu: AMD errata checking framework</title>
<updated>2010-07-28T20:12:04+00:00</updated>
<author>
<name>Hans Rosenfeld</name>
<email>hans.rosenfeld@amd.com</email>
</author>
<published>2010-07-28T17:09:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=d78d671db478eb8b14c78501c0cee1cc7baf6967'/>
<id>d78d671db478eb8b14c78501c0cee1cc7baf6967</id>
<content type='text'>
Errata are defined using the AMD_LEGACY_ERRATUM() or AMD_OSVW_ERRATUM()
macros. The latter is intended for newer errata that have an OSVW id
assigned, which it takes as first argument. Both take a variable number
of family-specific model-stepping ranges created by AMD_MODEL_RANGE().

Iff an erratum has an OSVW id, OSVW is available on the CPU, and the
OSVW id is known to the hardware, it is used to determine whether an
erratum is present. Otherwise, the model-stepping ranges are matched
against the current CPU to find out whether the erratum applies.

For certain special errata, the code using this framework might have to
conduct further checks to make sure an erratum is really (not) present.

Signed-off-by: Hans Rosenfeld &lt;hans.rosenfeld@amd.com&gt;
LKML-Reference: &lt;1280336972-865982-1-git-send-email-hans.rosenfeld@amd.com&gt;
Signed-off-by: H. Peter Anvin &lt;hpa@linux.intel.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Errata are defined using the AMD_LEGACY_ERRATUM() or AMD_OSVW_ERRATUM()
macros. The latter is intended for newer errata that have an OSVW id
assigned, which it takes as first argument. Both take a variable number
of family-specific model-stepping ranges created by AMD_MODEL_RANGE().

Iff an erratum has an OSVW id, OSVW is available on the CPU, and the
OSVW id is known to the hardware, it is used to determine whether an
erratum is present. Otherwise, the model-stepping ranges are matched
against the current CPU to find out whether the erratum applies.

For certain special errata, the code using this framework might have to
conduct further checks to make sure an erratum is really (not) present.

Signed-off-by: Hans Rosenfeld &lt;hans.rosenfeld@amd.com&gt;
LKML-Reference: &lt;1280336972-865982-1-git-send-email-hans.rosenfeld@amd.com&gt;
Signed-off-by: H. Peter Anvin &lt;hpa@linux.intel.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86, kgdb: early trap init for early debug</title>
<updated>2010-05-21T02:04:29+00:00</updated>
<author>
<name>Jan Kiszka</name>
<email>jan.kiszka@web.de</email>
</author>
<published>2010-05-21T02:04:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=29c843912a0baa7fa63033fe28e1ca7e796686a5'/>
<id>29c843912a0baa7fa63033fe28e1ca7e796686a5</id>
<content type='text'>
Allow the x86 arch to have early exception processing for the purpose
of debugging via the kgdb.

Signed-off-by: Jan Kiszka &lt;jan.kiszka@web.de&gt;
Signed-off-by: Jason Wessel &lt;jason.wessel@windriver.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Allow the x86 arch to have early exception processing for the purpose
of debugging via the kgdb.

Signed-off-by: Jan Kiszka &lt;jan.kiszka@web.de&gt;
Signed-off-by: Jason Wessel &lt;jason.wessel@windriver.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
