<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/arch/tile/include/asm, branch v3.0-rc4</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>arch/tile: more /proc and /sys file support</title>
<updated>2011-05-27T14:39:05+00:00</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2011-05-26T16:40:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=f133ecca9cbb31b5e6e9bda27cbe3034fbf656df'/>
<id>f133ecca9cbb31b5e6e9bda27cbe3034fbf656df</id>
<content type='text'>
This change introduces a few of the less controversial /proc and
/proc/sys interfaces for tile, along with sysfs attributes for
various things that were originally proposed as /proc/tile files.
It also adjusts the "hardwall" proc API.

Arnd Bergmann reviewed the initial arch/tile submission, which
included a complete set of all the /proc/tile and /proc/sys/tile
knobs that we had added in a somewhat ad hoc way during initial
development, and provided feedback on where most of them should go.

One knob turned out to be similar enough to the existing
/proc/sys/debug/exception-trace that it was re-implemented to use
that model instead.

Another knob was /proc/tile/grid, which reported the "grid" dimensions
of a tile chip (e.g. 8x8 processors = 64-core chip).  Arnd suggested
looking at sysfs for that, so this change moves that information
to a pair of sysfs attributes (chip_width and chip_height) in the
/sys/devices/system/cpu directory.  We also put the "chip_serial"
and "chip_revision" information from our old /proc/tile/board file
as attributes in /sys/devices/system/cpu.

Other information collected via hypervisor APIs is now placed in
/sys/hypervisor.  We create a /sys/hypervisor/type file (holding the
constant string "tilera") to be parallel with the Xen use of
/sys/hypervisor/type holding "xen".  We create three top-level files,
"version" (the hypervisor's own version), "config_version" (the
version of the configuration file), and "hvconfig" (the contents of
the configuration file).  The remaining information from our old
/proc/tile/board and /proc/tile/switch files becomes an attribute
group appearing under /sys/hypervisor/board/.

Finally, after some feedback from Arnd Bergmann for the previous
version of this patch, the /proc/tile/hardwall file is split up into
two conceptual parts.  First, a directory /proc/tile/hardwall/ which
contains one file per active hardwall, each file named after the
hardwall's ID and holding a cpulist that says which cpus are enclosed by
the hardwall.  Second, a /proc/PID file "hardwall" that is either
empty (for non-hardwall-using processes) or contains the hardwall ID.

Finally, this change pushes the /proc/sys/tile/unaligned_fixup/
directory, with knobs controlling the kernel code for handling the
fixup of unaligned exceptions.

Reviewed-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This change introduces a few of the less controversial /proc and
/proc/sys interfaces for tile, along with sysfs attributes for
various things that were originally proposed as /proc/tile files.
It also adjusts the "hardwall" proc API.

Arnd Bergmann reviewed the initial arch/tile submission, which
included a complete set of all the /proc/tile and /proc/sys/tile
knobs that we had added in a somewhat ad hoc way during initial
development, and provided feedback on where most of them should go.

One knob turned out to be similar enough to the existing
/proc/sys/debug/exception-trace that it was re-implemented to use
that model instead.

Another knob was /proc/tile/grid, which reported the "grid" dimensions
of a tile chip (e.g. 8x8 processors = 64-core chip).  Arnd suggested
looking at sysfs for that, so this change moves that information
to a pair of sysfs attributes (chip_width and chip_height) in the
/sys/devices/system/cpu directory.  We also put the "chip_serial"
and "chip_revision" information from our old /proc/tile/board file
as attributes in /sys/devices/system/cpu.

Other information collected via hypervisor APIs is now placed in
/sys/hypervisor.  We create a /sys/hypervisor/type file (holding the
constant string "tilera") to be parallel with the Xen use of
/sys/hypervisor/type holding "xen".  We create three top-level files,
"version" (the hypervisor's own version), "config_version" (the
version of the configuration file), and "hvconfig" (the contents of
the configuration file).  The remaining information from our old
/proc/tile/board and /proc/tile/switch files becomes an attribute
group appearing under /sys/hypervisor/board/.

Finally, after some feedback from Arnd Bergmann for the previous
version of this patch, the /proc/tile/hardwall file is split up into
two conceptual parts.  First, a directory /proc/tile/hardwall/ which
contains one file per active hardwall, each file named after the
hardwall's ID and holding a cpulist that says which cpus are enclosed by
the hardwall.  Second, a /proc/PID file "hardwall" that is either
empty (for non-hardwall-using processes) or contains the hardwall ID.

Finally, this change pushes the /proc/sys/tile/unaligned_fixup/
directory, with knobs controlling the kernel code for handling the
fixup of unaligned exceptions.

Reviewed-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arch/tile: cleanups for tilegx compat mode</title>
<updated>2011-05-20T02:56:13+00:00</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2011-05-17T19:52:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=818d8462bb7c717706bcfe994258e2c3710d1fd0'/>
<id>818d8462bb7c717706bcfe994258e2c3710d1fd0</id>
<content type='text'>
These changes make the syscall table line up correctly for
tilegx compat mode, and remove the stale sys32_fadvise64() function,
which isn't actually used by any syscall table.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
These changes make the syscall table line up correctly for
tilegx compat mode, and remove the stale sys32_fadvise64() function,
which isn't actually used by any syscall table.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arch/tile: support signal "exception-trace" hook</title>
<updated>2011-05-20T02:55:59+00:00</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2011-05-16T18:23:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=571d76acdab95876aeff869ab6449f826c23aa43'/>
<id>571d76acdab95876aeff869ab6449f826c23aa43</id>
<content type='text'>
This change adds support for /proc/sys/debug/exception-trace to tile.
Like x86 and sparc, by default it is set to "1", generating a one-line
printk whenever a user process crashes.  By setting it to "2", we get
a much more complete userspace diagnostic at crash time, including
a user-space backtrace, register dump, and memory dump around the
address of the crash.

Some vestiges of the Tilera-internal version of this support are
removed with this patch (the show_crashinfo variable and the
arch_coredump_signal function).  We retain a "crashinfo" boot parameter
which allows you to set the boot-time value of exception-trace.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This change adds support for /proc/sys/debug/exception-trace to tile.
Like x86 and sparc, by default it is set to "1", generating a one-line
printk whenever a user process crashes.  By setting it to "2", we get
a much more complete userspace diagnostic at crash time, including
a user-space backtrace, register dump, and memory dump around the
address of the crash.

Some vestiges of the Tilera-internal version of this support are
removed with this patch (the show_crashinfo variable and the
arch_coredump_signal function).  We retain a "crashinfo" boot parameter
which allows you to set the boot-time value of exception-trace.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arch/tile: use better definitions of xchg() and cmpxchg()</title>
<updated>2011-05-20T02:55:49+00:00</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2011-05-16T17:59:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=8aaf1dda42576b0f8dffb004065baa806f4df9b6'/>
<id>8aaf1dda42576b0f8dffb004065baa806f4df9b6</id>
<content type='text'>
These definitions use a ({}) construct to avoid some cases where
we were getting warnings about unused return values.  We also
promote the definition to the common &lt;asm/atomic.h&gt;, since it applies
to both the 32- and 64-bit atomics.

In addition, define __HAVE_ARCH_CMPXCHG for TILE-Gx since it has
efficient direct atomic instructions.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
These definitions use a ({}) construct to avoid some cases where
we were getting warnings about unused return values.  We also
promote the definition to the common &lt;asm/atomic.h&gt;, since it applies
to both the 32- and 64-bit atomics.

In addition, define __HAVE_ARCH_CMPXCHG for TILE-Gx since it has
efficient direct atomic instructions.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arch/tile: finish enabling support for TILE-Gx 64-bit chip</title>
<updated>2011-05-12T19:52:12+00:00</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2011-05-04T18:38:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=18aecc2b645bbb07851b196452a2af314222069b'/>
<id>18aecc2b645bbb07851b196452a2af314222069b</id>
<content type='text'>
This support was partially present in the existing code (look for
"__tilegx__" ifdefs) but with this change you can build a working
kernel using the TILE-Gx toolchain and ARCH=tilegx.

Most of these files are new, generally adding a foo_64.c file
where previously there was just a foo_32.c file.

The ARCH=tilegx directive redirects to arch/tile, not arch/tilegx,
using the existing SRCARCH mechanism in the top-level Makefile.

Changes to existing files:

- &lt;asm/bitops.h&gt; and &lt;asm/bitops_32.h&gt; changed to factor the
  include of &lt;asm-generic/bitops/non-atomic.h&gt; in the common header.

- &lt;asm/compat.h&gt; and arch/tile/kernel/compat.c changed to remove
  the "const" markers I had put on compat_sys_execve() when trying
  to match some recent similar changes to the non-compat execve.
  It turns out the compat version wasn't "upgraded" to use const.

- &lt;asm/opcode-tile_64.h&gt; and &lt;asm/opcode_constants_64.h&gt; were
  previously included accidentally, with the 32-bit contents.  Now
  they have the proper 64-bit contents.

Finally, I had to hack the existing hacky drivers/input/input-compat.h
to add yet another "#ifdef" for INPUT_COMPAT_TEST (same as x86_64).

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
Acked-by: Dmitry Torokhov &lt;dmitry.torokhov@gmail.com&gt; [drivers/input]
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This support was partially present in the existing code (look for
"__tilegx__" ifdefs) but with this change you can build a working
kernel using the TILE-Gx toolchain and ARCH=tilegx.

Most of these files are new, generally adding a foo_64.c file
where previously there was just a foo_32.c file.

The ARCH=tilegx directive redirects to arch/tile, not arch/tilegx,
using the existing SRCARCH mechanism in the top-level Makefile.

Changes to existing files:

- &lt;asm/bitops.h&gt; and &lt;asm/bitops_32.h&gt; changed to factor the
  include of &lt;asm-generic/bitops/non-atomic.h&gt; in the common header.

- &lt;asm/compat.h&gt; and arch/tile/kernel/compat.c changed to remove
  the "const" markers I had put on compat_sys_execve() when trying
  to match some recent similar changes to the non-compat execve.
  It turns out the compat version wasn't "upgraded" to use const.

- &lt;asm/opcode-tile_64.h&gt; and &lt;asm/opcode_constants_64.h&gt; were
  previously included accidentally, with the 32-bit contents.  Now
  they have the proper 64-bit contents.

Finally, I had to hack the existing hacky drivers/input/input-compat.h
to add yet another "#ifdef" for INPUT_COMPAT_TEST (same as x86_64).

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
Acked-by: Dmitry Torokhov &lt;dmitry.torokhov@gmail.com&gt; [drivers/input]
</pre>
</div>
</content>
</entry>
<entry>
<title>tile: replace mm-&gt;cpu_vm_mask with mm_cpumask()</title>
<updated>2011-05-04T18:41:44+00:00</updated>
<author>
<name>KOSAKI Motohiro</name>
<email>kosaki.motohiro@jp.fujitsu.com</email>
</author>
<published>2011-04-18T12:18:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=dc0b124d8edc6c2f95fc3a689cd40ec05ad85108'/>
<id>dc0b124d8edc6c2f95fc3a689cd40ec05ad85108</id>
<content type='text'>
We plan to change mm-&gt;cpu_vm_mask definition later. Thus, this patch convert
it into proper macro.

Signed-off-by: KOSAKI Motohiro &lt;kosaki.motohiro@jp.fujitsu.com&gt;
Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
We plan to change mm-&gt;cpu_vm_mask definition later. Thus, this patch convert
it into proper macro.

Signed-off-by: KOSAKI Motohiro &lt;kosaki.motohiro@jp.fujitsu.com&gt;
Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>tile,mn10300: add device parameter to dma_cache_sync()</title>
<updated>2011-05-04T18:41:36+00:00</updated>
<author>
<name>James Hogan</name>
<email>james.hogan@imgtec.com</email>
</author>
<published>2011-04-04T15:21:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=ef0aaf873ebadd7576f4fb2085ec4557a9df8bf5'/>
<id>ef0aaf873ebadd7576f4fb2085ec4557a9df8bf5</id>
<content type='text'>
Since v2.6.20 "Pass struct dev pointer to dma_cache_sync()"
(d3fa72e4556ec1f04e46a0d561d9e785ecaa173d), dma_cache_sync() takes a
struct dev pointer, but these appear to be missing from the tile and
mn10300 implementations, so add them.

Signed-off-by: James Hogan &lt;james.hogan@imgtec.com&gt;
[cmetcalf@tilera.com: took only the "tile" portion as I don't maintain mn10300]
Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Since v2.6.20 "Pass struct dev pointer to dma_cache_sync()"
(d3fa72e4556ec1f04e46a0d561d9e785ecaa173d), dma_cache_sync() takes a
struct dev pointer, but these appear to be missing from the tile and
mn10300 implementations, so add them.

Signed-off-by: James Hogan &lt;james.hogan@imgtec.com&gt;
[cmetcalf@tilera.com: took only the "tile" portion as I don't maintain mn10300]
Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arch/tile: clarify flush_buffer()/finv_buffer() function names</title>
<updated>2011-05-04T18:41:20+00:00</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2011-05-02T20:36:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=d07bd86d82622247dba8cc29974d3860f857ea33'/>
<id>d07bd86d82622247dba8cc29974d3860f857ea33</id>
<content type='text'>
They are only applicable for locally-homecached memory ranges, so
change their names to {flush,finv}_buffer_local().  Change inv_buffer()
to just do an mf instead of any kind of fancier barrier, since you're
obviously not going to be waiting for anything once the local homecache
is invalidated.

Fix tilepro.c network driver not to bother calling finv_buffer when
stopping the EPP, but just mf after memset to ensure that it will not
see any packet data after we finish stopping; use finv_buffer_remote()
when doing exit-time cleanup.

This also fixes a (not very interesting) generic Linux build failure
where drivers/scsi/st.c declares its own flush_buffer().

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
They are only applicable for locally-homecached memory ranges, so
change their names to {flush,finv}_buffer_local().  Change inv_buffer()
to just do an mf instead of any kind of fancier barrier, since you're
obviously not going to be waiting for anything once the local homecache
is invalidated.

Fix tilepro.c network driver not to bother calling finv_buffer when
stopping the EPP, but just mf after memset to ensure that it will not
see any packet data after we finish stopping; use finv_buffer_remote()
when doing exit-time cleanup.

This also fixes a (not very interesting) generic Linux build failure
where drivers/scsi/st.c declares its own flush_buffer().

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arch/tile: kernel-related cleanups from removing static page size</title>
<updated>2011-05-04T18:41:13+00:00</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2011-05-02T20:21:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=5386e735897afd8bcd332caf21a5f68d9e0e81c6'/>
<id>5386e735897afd8bcd332caf21a5f68d9e0e81c6</id>
<content type='text'>
User space code has been able to discover the static page size
by including a special &lt;hv/pagesize.h&gt; file.  In the current release,
that file is now gone, and &lt;asm/page.h&gt; doesn't rely on it.  The
getpagesize() API is now the only way for userspace to get the page size.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
User space code has been able to discover the static page size
by including a special &lt;hv/pagesize.h&gt; file.  In the current release,
that file is now gone, and &lt;asm/page.h&gt; doesn't rely on it.  The
getpagesize() API is now the only way for userspace to get the page size.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arch/tile: various header improvements for building drivers</title>
<updated>2011-05-04T18:40:54+00:00</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2011-05-02T20:06:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=28d717411badb78df71ecf087a07b93caf418f59'/>
<id>28d717411badb78df71ecf087a07b93caf418f59</id>
<content type='text'>
This change adds a number of missing headers in asm (fb.h, parport.h,
serial.h, and vga.h) using the minimal generic versions.

It also adds a number of missing interfaces that showed up as build
failures when trying to build various drivers not normally included in the
"tile" distribution: ioremap_wc(), memset_io(), io{read,write}{16,32}be(),
virt_to_bus(), bus_to_virt(), irq_canonicalize(), __pte(), __pgd(),
and __pmd().  I also added a cast in virt_to_page() since not all callers
pass a pointer.

I fixed &lt;asm/stat.h&gt; to properly include a __KERNEL__ guard for the
__ARCH_WANT_STAT64 symbol, and &lt;asm/swab.h&gt; to use __builtin_bswap32()
even for our 64-bit architecture, since the same code is produced.

I added an export for get_cycles(), since it's used in some modules.

And I made &lt;arch/spr_def.h&gt; properly include the __KERNEL__ guard,
even though it's not yet exported, since it likely will be soon.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This change adds a number of missing headers in asm (fb.h, parport.h,
serial.h, and vga.h) using the minimal generic versions.

It also adds a number of missing interfaces that showed up as build
failures when trying to build various drivers not normally included in the
"tile" distribution: ioremap_wc(), memset_io(), io{read,write}{16,32}be(),
virt_to_bus(), bus_to_virt(), irq_canonicalize(), __pte(), __pgd(),
and __pmd().  I also added a cast in virt_to_page() since not all callers
pass a pointer.

I fixed &lt;asm/stat.h&gt; to properly include a __KERNEL__ guard for the
__ARCH_WANT_STAT64 symbol, and &lt;asm/swab.h&gt; to use __builtin_bswap32()
even for our 64-bit architecture, since the same code is produced.

I added an export for get_cycles(), since it's used in some modules.

And I made &lt;arch/spr_def.h&gt; properly include the __KERNEL__ guard,
even though it's not yet exported, since it likely will be soon.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
