linux.git/arch/sparc/kernel, branch v2.6.32

sparc: Move of_set_property_mutex acquisition outside of devtree_lock grab.

2009-11-09T01:41:20+00:00

Otherwise we try to sleep with preemption disabled, etc.

Noticed by Thomas Gleixner.

Signed-off-by: David S. Miller

sparc64: replace parentheses in pmul()

2009-11-08T08:26:56+00:00

`>>' has a higher precedence than `?' so src2 evaluated to
either 16 or 0 dependent on the bits set in rs2.

Signed-off-by: Roel Kluin 
Signed-off-by: David S. Miller

sparc64: Set IRQF_DISABLED on LDC channel IRQs.

2009-10-13T07:49:09+00:00

With lots of virtual devices it's easy to generate a lot of
events and chew up the kernel IRQ stack.

Reported-by: hyl 
Signed-off-by: David S. Miller

sparc64: Fix niagara2 perf IRQ bits.

2009-10-09T07:42:40+00:00

Signed-off-by: David S. Miller

Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6

2009-10-05T19:06:40+00:00

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6:
  sparc: using HZ needs an include of linux/param.h
  sparc32: convert to asm-generic/hardirq.h
  sparc64: Cache per-cpu %pcr register value in perf code.
  sparc64: Fix comment typo in perf_event.c
  sparc64: Minor coding style fixups in perf code.
  sparc64: Add a basic conflict engine in preparation for multi-counter support.
  sparc64: Increase vmalloc size to fix percpu regressions.
  sparc64: Add initial perf event conflict resolution and checks.
  sparc: Niagara1 perf event support.
  sparc: Add Niagara2 HW cache event support.
  sparc: Support all ultra3 and ultra4 derivatives.
  sparc: Support HW cache events.

sparc64: Cache per-cpu %pcr register value in perf code.

2009-09-30T04:27:06+00:00

Signed-off-by: David S. Miller

sparc64: Fix comment typo in perf_event.c

2009-09-29T22:10:23+00:00

Signed-off-by: David S. Miller

sparc64: Minor coding style fixups in perf code.

2009-09-29T00:37:12+00:00

These got introduced during the counter --> event tree-wide
renaming.

Signed-off-by: David S. Miller

sparc64: Add a basic conflict engine in preparation for multi-counter support.

2009-09-29T00:35:20+00:00

The hardware counter ->event_base state records and encoding of
the "struct perf_event_map" entry used for the event.

We use this to make sure that when we have more than 1 event,
both can be scheduled into the hardware at the same time.

As usual, structure of code is largely cribbed from powerpc.

Signed-off-by: David S. Miller

sparc64: implement page mapping percpu first chunk allocator

2009-09-29T00:17:57+00:00

Implement page mapping percpu first chunk allocator as a fallback to
the embedding allocator.  The next patch will make the embedding
allocator check distances between units to determine whether it fits
within the vmalloc area so that this fallback can be used on such
cases.

sparc64 currently has relatively small vmalloc area which makes it
impossible to create any dynamic chunks on certain configurations
leading to percpu allocation failures.  This and the next patch should
allow those configurations to keep working until proper solution is
found.

While at it, mark pcpu_cpu_distance() with __init.

Signed-off-by: Tejun Heo 
Acked-by: David S. Miller