linux.git/arch/sparc/kernel/setup_64.c, branch v3.10

sparc: kernel: using strlcpy() instead of strcpy()

2013-06-19T09:10:29+00:00

'boot_command_line' and 'full_boot_str' has a fix length, 'cmdline_p' and
'boot_command' maybe larger than them. So use strlcpy() instead of strcpy()
to avoid memory overflow.

Signed-off-by: Zhao Hongjiang 
Signed-off-by: David S. Miller

taint: add explicit flag to show whether lock dep is still OK.

2013-01-21T06:47:57+00:00

Fix up all callers as they were before, with make one change: an
unsigned module taints the kernel, but doesn't turn off lockdep.

Signed-off-by: Rusty Russell

sparc64: Improvde documentation and readability of atomic backoff code.

2012-10-28T20:04:47+00:00

Document what's going on in asm/backoff.h with a large and descriptive
comment.  Refer to it above the cpu_relax() definition in
asm/processor_64.h

Rename the pause patching section to have "3insn" in it's name like
the other patching sections do.

Based upon feedback from Sam Ravnborg.

Signed-off-by: David S. Miller

sparc64: Use pause instruction when available.

2012-10-28T06:00:41+00:00

In atomic backoff and cpu_relax(), use the pause instruction
found on SPARC-T4 and later.

It makes the cpu strand unselectable for the given number of
cycles, unless an intervening disrupting trap occurs.

Signed-off-by: David S. Miller

sparc64: Add detection for features new in SPARC-T4.

2012-08-19T06:02:36+00:00

Compare and branch, pause, and the various new cryptographic opcodes.

We advertise the crypto opcodes to userspace using one hwcap bit,
HWCAP_SPARC_CRYPTO.

This essentially indicates that the %cfr register can be interrograted
and used to determine exactly which crypto opcodes are available on
the current cpu.

We use the %cfr register to report all of the crypto opcodes available
in the bootup CPU caps log message, and via /proc/cpuinfo.

Signed-off-by: David S. Miller

Disintegrate asm/system.h for Sparc

2012-03-28T17:30:03+00:00

Disintegrate asm/system.h for Sparc.

Signed-off-by: David Howells 
cc: sparclinux@vger.kernel.org

sparc64: Patch sun4v code sequences properly on module load.

2011-11-18T06:44:58+00:00

Some of the sun4v code patching occurs in inline functions visible
to, and usable by, modules.

Therefore we have to patch them up during module load.

Signed-off-by: David S. Miller

sparc: Make '-p' boot option meaningful again.

2011-09-21T19:48:06+00:00

If "-p" is given on the command line, clear the CON_BOOT
flag for the initial early boot PROM console.

This is necessary to try and see crash messages that occur
between the registry of the VT console and the probing of
the first framebuffer or serial console.  During this time
no console messages are emitted because the VT console
registry (even if no backend is registered to it) removes
the early console if CON_BOOT is set.

Signed-off-by: David S. Miller

sparc64: Future proof Niagara cpu detection.

2011-09-16T21:21:33+00:00

Recognize T4 and T5 chips.  Treating them both as "T2 plus other
stuff" should be extremely safe and make sure distributions will work
when those chips actually ship to customers.

Signed-off-by: David S. Miller

sparc64: Only Panther cheetah+ chips have POPC.

2011-08-30T04:14:29+00:00

Signed-off-by: David S. Miller