Signed-off-by: Paul Mundt <lethal@linux-sh.org>

Do not follow the frame pointers (/proc/X/task/1/stat) unless we were
compiled with them.

Signed-off-by: David McCullough <david_mccullough@au.securecomputing.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

SH-2 can presently get in to some pretty bogus states, so
we tidy up the dependencies a bit and get it all building
again.

This gets us a bit closer to a functional allyesconfig
and allmodconfig, though there are still a few things to
fix up.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>

Signed-off-by: Paul Mundt <lethal@linux-sh.org>

This adds in some more __user annotations. These weren't being
handled properly in some of the __get_user and __put_user paths,
so tidy those up.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>

As pointed out by Saito-san, without the sr.bl manipulation we can
occasionally hit delays in the idle loop due to interrupt handling, so
ensure that interrupts are blocked before going to sleep.

At the same time, we throw in TIF_POLLING_NRFLAG for the !hlt_counter
case (primarily used by the ST-40 parts).

Signed-off-by: Paul Mundt <lethal@linux-sh.org>

This adds basic support for clockevents and clocksources,
presently only implemented for TMU-based systems (which
are the majority of SH-3 and SH-4 systems).

The old NO_IDLE_HZ implementation is also dropped completely,
the only users of this were on TMU-based systems anyways.

More work needs to be done to generalize the TMU handling,
in that the current implementation is rather tied to the
notion of TMU0 and TMU1 utilization.

Additionally, as more SH timers switch over to this scheme,
we'll be able to gut most of the remaining system timer
infrastructure that existed before.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>

This went in immediately after SH added the die chain notifiers,
so move over to that instead..

Signed-off-by: Paul Mundt <lethal@linux-sh.org>

There are a few different cases for figuring out how to
size the instruction. We read in the instruction located
at regs->pc - 4 when rewinding the opcode to figure out if
there's a 32-bit opcode before the faulting instruction, with
a default of a - 2 adjustment on a mismatch. In practice this
works for the cases where pc - 4 is just another 16-bit opcode,
or we happen to have a 32-bit and a 16-bit immediately
preceeding the pc value.

In the cases where we aren't rewinding, this is much less ugly..

We also don't bother fixing up the places where we're explicitly
dealing with 16-bit instructions, since this might lead to
confusion regarding the encoding size possibilities on other
CPU variants.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>

SH-2A supports both 16 and 32-bit instructions, add a simple helper
for figuring out the instruction size in the places where there are
hardcoded 16-bit assumptions.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>