linux.git/arch/sh/kernel/io_generic.c, branch master

sh: machvec IO death.

2010-11-01T13:49:04+00:00

This takes a bit of a sledgehammer to the machvec I/O routines. The
iomem case requires no special casing and so can just be dropped
outright. This only leaves the ioport casing for PCI and SuperIO
mangling. With the SuperIO case going through the standard ioport
mapping, it's possible to replace everything with generic routines.

With this done the standard I/O routines are tidied up and NO_IOPORT
now gets default-enabled for the vast majority of boards.

Signed-off-by: Paul Mundt

sh: support for platforms without PIO.

2010-06-02T07:31:42+00:00

This extends some of the existing special casing for HAS_IOPORT
platforms and gets it to the point where platforms can begin to
conditionally select it.

The major changes here are that the PIO routines themselves go away
completely, including all of the machvec port mapping wrappers. With this
in place it's possible for any non-machvec abusing platform to disable
PIO completely. At present this is left as an opt-in until the abusers
are the odd ones out instead of the majority.

Signed-off-by: Paul Mundt

sh: Use the generic I/O port base for slowdown.

2009-11-12T07:36:26+00:00

This fixes up the build and behaviour for various configurations. Namely
the CONFIG_32BIT cases where legacy mappings do not exist, as well as the
sh64 build.

Signed-off-by: Paul Mundt

sh: Handle ioport_map() cases for >= P1SEG addresses.

2009-09-28T06:04:04+00:00

This fixes up the case where certain drivers already do their own
remapping and subsequently attempt to use the PIO calls for I/O. In this
case there is no additional remapping that needs to be done, and the
address can be casted in to the cookie directly.

Signed-off-by: Paul Mundt

sh: generic_in/outs{bwl} optimizations.

2009-08-24T08:26:39+00:00

After performing the port2addr conversion, and checking that the data is
correctly aligned, simply call __raw_readsX/writesX. These have already been
optimised.

Signed-off-by: Stuart Menefy 
Signed-off-by: Paul Mundt

sh: More I/O routine overhauling.

2008-10-03T20:25:52+00:00

This tidies up a lot of the PIO/MMIO split. No in-tree platforms were
making use of the MMIO overloading through the machvec (nor have any of
them been in some time), so we just kill all of that off. The ISA I/O
routine wrapping remains unaffected, which remains the only special
casing outside of the iomap API that boards need to think about.

Signed-off-by: Paul Mundt

sh: fixup many sparse errors.

2008-09-08T01:35:04+00:00

Signed-off-by: Paul Mundt

sh: trapped io support V2

2008-02-14T05:22:09+00:00

The idea is that we want to get rid of the in/out/readb/writeb callbacks from
the machvec and replace that with simple inline read and write operations to
memory. Fast and simple for most hardware devices (think pci).

Some devices require special treatment though - like 16-bit only CF devices -
so we need to have some method to hook in callbacks.

This patch makes it possible to add a per-device trap generating filter. This
way we can get maximum performance of sane hardware - which doesn't need this
filter - and crappy hardware works but gets punished by a performance hit.

V2 changes things around a bit and replaces io access callbacks with a
simple minimum_bus_width value. In the future we can add stride as well.

Signed-off-by: Magnus Damm 
Signed-off-by: Paul Mundt

sh: Revert lazy dcache writeback changes.

2007-03-05T10:46:47+00:00

These ended up causing too many problems on older parts,
revert for now..

Signed-off-by: Paul Mundt

sh: rts7751r2d board updates.

2007-02-15T09:20:52+00:00

This tidies up some of the rts7751r2d mess and gets it booting
again. Update the defconfig, too.

Signed-off-by: Masayuki Hosokawa 
Signed-off-by: Paul Mundt