linux.git/arch/sh/kernel/cpu, branch v2.6.30

sh: Use __INIT macro instead of .text.init.

2009-04-28T02:51:58+00:00

The sh architecture has some code in the .text.init section, but it
does not reference that section in its linker scripts.

This change moves this code from the .text.init section to the
.init.text section, which is presumably where it belongs.

Signed-off-by: Tim Abbott 
Acked-by: Sam Ravnborg 
Acked-by: Paul Mundt 
Signed-off-by: Linus Torvalds

sh: sh7723: Don't default enable the RTC clock.

2009-04-16T05:16:33+00:00

rtc-sh takes care of this now, so no need to have this always enabled.

Signed-off-by: Paul Mundt

sh: sh7722: Don't default enable the RTC clock.

2009-04-16T05:15:38+00:00

rtc-sh takes care of this now, so no need to have this always enabled.

Signed-off-by: Paul Mundt

sh: sh7786: modify usb setup timeout judgment bug.

2009-04-13T22:25:35+00:00

This corrects a race with the PHY RST bit not being set properly if the
PLL status changes right before timeout. This resulted in it potentially
failing even if the device came up in time.

Special thanks to Mr. Juha Leppanen and Iwamatsu-san for reporting this
out and reviewing it.

Reported-by: Juha Leppanen 
Reviewed-by: Nobuhiro Iwamatsu 
Tested-by: Paul Mundt 
Signed-off-by: Kuninori Morimoto 
Signed-off-by: Paul Mundt

sh: Fix up DSP context save/restore.

2009-04-04T15:48:11+00:00

There were a number of issues with the DSP context save/restore code,
mostly left-over relics from when it was introduced on SH3-DSP with
little follow-up testing, resulting in things like task_pt_dspregs()
referencing incorrect state on the stack.

This follows the MIPS convention of tracking the DSP state in the
thread_struct and handling the state save/restore in switch_to() and
finish_arch_switch() respectively. The regset interface is also updated,
which allows us to finally be rid of task_pt_dspregs() and the special
cased task_pt_regs().

Signed-off-by: Michael Trimarchi 
Signed-off-by: Paul Mundt

sh: Kill off broken direct-mapped cache mode.

2009-04-02T08:40:16+00:00

Forcing direct-mapped worked on certain older 2-way set associative
parts, but was always error prone on 4-way parts. As these are the
norm these days, there is not much point in continuing to support this
mode. Most of the folks that used direct-mapped mode generally just
wanted writethrough caching in the first place..

Signed-off-by: Paul Mundt

sh: Tidy up sh7786 pinmux table.

2009-03-30T22:39:51+00:00

Formatting and typo fix.

Signed-off-by: Kuninori Morimoto 
Signed-off-by: Paul Mundt

sh: Remove buggy definition from SH7786 pinmux_data[]

2009-03-30T22:36:24+00:00

Signed-off-by: Kuninori Morimoto 
Signed-off-by: Paul Mundt

sh: Support for extended ASIDs on PTEAEX-capable SH-X3 cores.

2009-03-17T08:49:49+00:00

This adds support for extended ASIDs (up to 16-bits) on newer SH-X3 cores
that implement the PTAEX register and respective functionality. Presently
only the 65nm SH7786 (90nm only supports legacy 8-bit ASIDs).

The main change is in how the PTE is written out when loading the entry
in to the TLB, as well as in how the TLB entry is selectively flushed.

While SH-X2 extended mode splits out the memory-mapped U and I-TLB data
arrays for extra bits, extended ASID mode splits out the address arrays.
While we don't use the memory-mapped data array access, the address
array accesses are necessary for selective TLB flushes, so these are
implemented newly and replace the generic SH-4 implementation.

With this, TLB flushes in switch_mm() are almost non-existent on newer
parts.

Signed-off-by: Paul Mundt

sh: clkfwk: Safer resume from hibernation.

2009-03-16T11:11:00+00:00

This patch fixes a possible problem in the resume from
hibenration. It temporaneally saves the clk->rate on the
stack to avoid any possible change during the clk->set_parent(..)
call.

Signed-off-by: Francesco Virlinzi 
Signed-off-by: Paul Mundt