linux.git/arch/sh/kernel/cpu/sh2a, branch v2.6.24

sh: Use boot_cpu_data for CPU probe.

2007-09-27T09:18:39+00:00

This moves off of smp_processor_id() and only sets the probe
information for the boot CPU directly. This will be copied out
for the secondaries, so there's no reason to do this each time.

This also allows for some header tidying.

Signed-off-by: Paul Mundt

sh: intc - add support for sh7206

2007-09-21T02:57:50+00:00

This patch converts the cpu specific interrupt setup code for sh7206
from ipr to intc. New vectors are also added to match the information
provided by the datasheet.

Signed-off-by: Magnus Damm 
Signed-off-by: Paul Mundt

sh: fix irqs for the second serial port on sh7206

2007-09-21T02:57:50+00:00

This patch makes sure the serial port interrupt irqs matches the
datasheet.  Only irqs for SCIF1 are changed. While at some cosmetic
spaces are added.

Signed-off-by: Magnus Damm 
Signed-off-by: Paul Mundt

sh: IPR/INTC2 IRQ setup consolidation.

2007-07-20T03:18:20+00:00

This patch unifies the cpu specific interrupt setup functions for
interrupt controller blocks such as ipr, intc2 and intc. There is no
point in having separate functions for each interrupt controller, so
let's clean this up.

Signed-off-by: Magnus Damm 
Signed-off-by: Paul Mundt

sh: rework ipr code

2007-06-15T09:56:19+00:00

This patch reworks the ipr code by grouping the offset array together
with the ipr_data structure in a new data structure called ipr_desc.
This new structure also contains the name of the controller in struct
irq_chip. The idea behind putting struct irq_chip in there is that we
can use offsetof() to locate the base addresses in the irq_chip
callbacks. This strategy has much in common with the recently merged
intc2 code.

One logic change has been made - the original ipr code enabled the
interrupts by default but with this patch they are all disabled by
default.

Signed-off-by: Magnus Damm 
Signed-off-by: Paul Mundt

sh: Add 32-bit opcode feature CPU flag.

2007-05-09T01:35:01+00:00

Add a CPU flag for the CPUs that support 32-bit opcodes, which
gets passed down to userspace.

Signed-off-by: Paul Mundt

sh: Support for SH-2A 32-bit opcodes.

2007-05-09T01:35:01+00:00

SH-2A supports both 16 and 32-bit instructions, add a simple helper
for figuring out the instruction size in the places where there are
hardcoded 16-bit assumptions.

Signed-off-by: Paul Mundt

Storage class should be before const qualifier

2007-02-17T19:11:19+00:00

The C99 specification states in section 6.11.5:

The placement of a storage-class specifier other than at the
beginning of the declaration specifiers in a declaration is an
obsolescent feature.

Signed-off-by: Tobias Klauser 
Signed-off-by: Adrian Bunk

sh: Fixup cpu_data references for the non-boot CPUs.

2007-02-13T01:54:45+00:00

There are a lot of bogus cpu_data-> references that only end up working
for the boot CPU, convert these to current_cpu_data to fixup SMP.

Signed-off-by: Paul Mundt

sh: sh7619 / sh7206 IPR initialize update

2007-02-13T01:54:43+00:00

IPR initialize proceduere update.

Signed-off-by: Yoshinori Sato 
Signed-off-by: Paul Mundt