<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/arch/sh/kernel/cpu/sh2, branch v2.6.25</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>sh: Fix up the address error exception handler for SH-2.</title>
<updated>2008-03-13T10:43:07+00:00</updated>
<author>
<name>Kieran Bingham</name>
<email>kbingham@mpc-data.co.uk</email>
</author>
<published>2008-03-13T10:43:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=6c0602b8dd4b41c078b52ed8ea97023970781744'/>
<id>6c0602b8dd4b41c078b52ed8ea97023970781744</id>
<content type='text'>
Presently the SH-2/SH-2A address error exception dispatch copies off the
register state from the stack and skips over the first register, skewing
the rest. Fix up the math here so that the proper register state is
handed down to the exception handler itself.

Signed-off-by: Kieran Bingham &lt;kbingham@mpc-data.co.uk&gt;
Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Presently the SH-2/SH-2A address error exception dispatch copies off the
register state from the stack and skips over the first register, skewing
the rest. Fix up the math here so that the proper register state is
handed down to the exception handler itself.

Signed-off-by: Kieran Bingham &lt;kbingham@mpc-data.co.uk&gt;
Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>serial: Move asm-sh/sci.h to linux/serial_sci.h.</title>
<updated>2008-02-26T05:52:45+00:00</updated>
<author>
<name>Paul Mundt</name>
<email>lethal@linux-sh.org</email>
</author>
<published>2008-02-26T05:52:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=96de1a8f0275bd67f243833e7088baced518f873'/>
<id>96de1a8f0275bd67f243833e7088baced518f873</id>
<content type='text'>
This header is needed on other architectures as well (namely h8300),
which currently fails to build without this in place. Rather than
duplicating the port definition completely there, just move this to a
common location instead.

This should get h8300 working again for 2.6.25, in addition to the
changes already pushed by Sato-san in -rc2.

Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This header is needed on other architectures as well (namely h8300),
which currently fails to build without this in place. Rather than
duplicating the port definition completely there, just move this to a
common location instead.

This should get h8300 working again for 2.6.25, in addition to the
changes already pushed by Sato-san in -rc2.

Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sh: intc - remove default interrupt priority tables</title>
<updated>2008-01-28T04:19:02+00:00</updated>
<author>
<name>Magnus Damm</name>
<email>damm@igel.co.jp</email>
</author>
<published>2008-01-10T05:08:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=7f3edee81fbd49114c28057512906f169caa0bed'/>
<id>7f3edee81fbd49114c28057512906f169caa0bed</id>
<content type='text'>
This patch removes interrupt priority tables from the intc code.
Optimal priority assignment varies with embedded application anyway,
so keeping the interrupt priority tables together with cpu-specific
code doesn't make sense.

The function intc_set_priority() should be used instead to set the
desired interrupt priority level.

Signed-off-by: Magnus Damm &lt;damm@igel.co.jp&gt;
Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch removes interrupt priority tables from the intc code.
Optimal priority assignment varies with embedded application anyway,
so keeping the interrupt priority tables together with cpu-specific
code doesn't make sense.

The function intc_set_priority() should be used instead to set the
desired interrupt priority level.

Signed-off-by: Magnus Damm &lt;damm@igel.co.jp&gt;
Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sh: SH-2A FPU support.</title>
<updated>2008-01-28T04:18:57+00:00</updated>
<author>
<name>Paul Mundt</name>
<email>lethal@linux-sh.org</email>
</author>
<published>2007-11-26T11:38:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=74d99a5e262229ee865f6f68528d10b82471ead6'/>
<id>74d99a5e262229ee865f6f68528d10b82471ead6</id>
<content type='text'>
Signed-off-by: Kieran Bingham &lt;kbingham@mpc-data.co.uk&gt;
Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Kieran Bingham &lt;kbingham@mpc-data.co.uk&gt;
Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sh: Share bug/debug traps across _32 and _64.</title>
<updated>2008-01-28T04:18:50+00:00</updated>
<author>
<name>Paul Mundt</name>
<email>lethal@linux-sh.org</email>
</author>
<published>2007-11-20T09:08:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=5a4f7c66be981c6b5f44a4d66a14ea6ac9b7b6b0'/>
<id>5a4f7c66be981c6b5f44a4d66a14ea6ac9b7b6b0</id>
<content type='text'>
Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sh: Use boot_cpu_data for CPU probe.</title>
<updated>2007-09-27T09:18:39+00:00</updated>
<author>
<name>Paul Mundt</name>
<email>lethal@linux-sh.org</email>
</author>
<published>2007-09-27T09:18:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=cb7af21f7d370edb3a6a6d3e15cb17c8fd61591e'/>
<id>cb7af21f7d370edb3a6a6d3e15cb17c8fd61591e</id>
<content type='text'>
This moves off of smp_processor_id() and only sets the probe
information for the boot CPU directly. This will be copied out
for the secondaries, so there's no reason to do this each time.

This also allows for some header tidying.

Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This moves off of smp_processor_id() and only sets the probe
information for the boot CPU directly. This will be copied out
for the secondaries, so there's no reason to do this each time.

This also allows for some header tidying.

Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sh: intc - add support for sh7619</title>
<updated>2007-09-21T02:57:50+00:00</updated>
<author>
<name>Magnus Damm</name>
<email>damm@igel.co.jp</email>
</author>
<published>2007-08-16T15:53:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=0dc3fc04dd0251aa95b49ca7048e9e8f24291166'/>
<id>0dc3fc04dd0251aa95b49ca7048e9e8f24291166</id>
<content type='text'>
This patch converts the cpu specific interrupt setup code for sh7619
from ipr to intc. New vectors are also added to match the information
provided by the datasheet.

Signed-off-by: Magnus Damm &lt;damm@igel.co.jp&gt;
Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch converts the cpu specific interrupt setup code for sh7619
from ipr to intc. New vectors are also added to match the information
provided by the datasheet.

Signed-off-by: Magnus Damm &lt;damm@igel.co.jp&gt;
Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sh: IPR/INTC2 IRQ setup consolidation.</title>
<updated>2007-07-20T03:18:20+00:00</updated>
<author>
<name>Magnus Damm</name>
<email>damm@igel.co.jp</email>
</author>
<published>2007-07-18T08:57:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=90015c89386ffb8967422fbe9f5e7babf1dc2c5e'/>
<id>90015c89386ffb8967422fbe9f5e7babf1dc2c5e</id>
<content type='text'>
This patch unifies the cpu specific interrupt setup functions for
interrupt controller blocks such as ipr, intc2 and intc. There is no
point in having separate functions for each interrupt controller, so
let's clean this up.

Signed-off-by: Magnus Damm &lt;damm@igel.co.jp&gt;
Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch unifies the cpu specific interrupt setup functions for
interrupt controller blocks such as ipr, intc2 and intc. There is no
point in having separate functions for each interrupt controller, so
let's clean this up.

Signed-off-by: Magnus Damm &lt;damm@igel.co.jp&gt;
Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sh: rework ipr code</title>
<updated>2007-06-15T09:56:19+00:00</updated>
<author>
<name>Magnus Damm</name>
<email>damm@igel.co.jp</email>
</author>
<published>2007-06-15T09:56:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=68abdbbb03476a60d932eeba0035dd5069afec38'/>
<id>68abdbbb03476a60d932eeba0035dd5069afec38</id>
<content type='text'>
This patch reworks the ipr code by grouping the offset array together
with the ipr_data structure in a new data structure called ipr_desc.
This new structure also contains the name of the controller in struct
irq_chip. The idea behind putting struct irq_chip in there is that we
can use offsetof() to locate the base addresses in the irq_chip
callbacks. This strategy has much in common with the recently merged
intc2 code.

One logic change has been made - the original ipr code enabled the
interrupts by default but with this patch they are all disabled by
default.

Signed-off-by: Magnus Damm &lt;damm@igel.co.jp&gt;
Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch reworks the ipr code by grouping the offset array together
with the ipr_data structure in a new data structure called ipr_desc.
This new structure also contains the name of the controller in struct
irq_chip. The idea behind putting struct irq_chip in there is that we
can use offsetof() to locate the base addresses in the irq_chip
callbacks. This strategy has much in common with the recently merged
intc2 code.

One logic change has been made - the original ipr code enabled the
interrupts by default but with this patch they are all disabled by
default.

Signed-off-by: Magnus Damm &lt;damm@igel.co.jp&gt;
Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sh: Fixup misaligned data for sh2 lockdep.</title>
<updated>2007-06-11T06:33:44+00:00</updated>
<author>
<name>Paul Mundt</name>
<email>lethal@linux-sh.org</email>
</author>
<published>2007-06-11T06:33:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=9f9a5de4669902f80b6664baeba01595ffce3597'/>
<id>9f9a5de4669902f80b6664baeba01595ffce3597</id>
<content type='text'>
lockdep/irqflags tracing on SH-2 ends up with a misaligned
branch, fix it.

Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
lockdep/irqflags tracing on SH-2 ends up with a misaligned
branch, fix it.

Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
