linux.git/arch/sh/kernel/cpu/init.c, branch v2.6.24

sh: Bring SMP support back from the dead.

2007-09-21T09:32:32+00:00

There was a very preliminary bunch of SMP code scattered around for the
SH7604 microcontrollers from way back when, and it has mostly suffered
bitrot since then. With the tree already having been slowly getting
prepped for SMP, this plugs in most of the remaining platform-independent
bits.

Signed-off-by: Magnus Damm 
Signed-off-by: Paul Mundt

sh: Support explicit L1 cache disabling.

2007-09-21T02:57:46+00:00

This reworks the cache mode configuration in Kconfig, and allows for
explicit selection of write-back/write-through/off configurations.
All of the cache flushing routines are optimized away for the off
case.

Signed-off-by: Paul Mundt

sh: Tidy up dependencies for SH-2 build.

2007-06-11T06:32:07+00:00

SH-2 can presently get in to some pretty bogus states, so
we tidy up the dependencies a bit and get it all building
again.

This gets us a bit closer to a functional allyesconfig
and allmodconfig, though there are still a few things to
fix up.

Signed-off-by: Paul Mundt

sh: speculative execution support for SH7780.

2007-05-07T02:10:51+00:00

SH7780 has a speculative execution mode where it can speculatively
perform an instruction fetch for subroutine returns, this allows it
to be enabled. There are some various pitfalls associated with this
mode, so it's left as depending on CONFIG_EXPERIMENTAL and not
enabled by default.

Signed-off-by: Paul Mundt

sh: Fix SH-3 cache entry_mask and way_size calculation.

2007-03-12T07:15:22+00:00

The code for performing the calculation was only in the SH-4 probe
path, move it out to the common path so the other parts get this
right too.

Signed-off-by: Paul Mundt

sh: Fixup cpu_data references for the non-boot CPUs.

2007-02-13T01:54:45+00:00

There are a lot of bogus cpu_data-> references that only end up working
for the boot CPU, convert these to current_cpu_data to fixup SMP.

Signed-off-by: Paul Mundt

sh: Use a per-cpu ASID cache.

2007-02-13T01:54:45+00:00

Previously this was implemented using a global cache, cache
this per-CPU instead and bump up the number of context IDs to
match NR_CPUS.

Signed-off-by: Paul Mundt

sh: Add support for SH7206 and SH7619 CPU subtypes.

2006-12-06T01:45:36+00:00

This implements initial support for the SH7206 (SH-2A) and SH7619
(SH-2) MMU-less CPUs.

Signed-off-by: Yoshinori Sato 
Signed-off-by: Paul Mundt

sh: Calculate shm alignment at runtime.

2006-09-27T09:36:17+00:00

Set the SHM alignment at runtime, based off of probed cache desc.
Optimize get_unmapped_area() to only colour align shared mappings.

Signed-off-by: Paul Mundt

sh: Optimized cache handling for SH-4/SH-4A caches.

2006-09-27T05:09:26+00:00

This reworks some of the SH-4 cache handling code to more easily
accomodate newer-style caches (particularly for the > direct-mapped
case), as well as optimizing some of the old code.

Signed-off-by: Richard Curnow 
Signed-off-by: Paul Mundt