linux.git/arch/ppc/kernel/misc.S, branch v2.6.20

[POWERPC] Consolidate feature fixup code

2006-10-25T01:42:10+00:00

There are currently two versions of the functions for applying the
feature fixups, one for CPU features and one for firmware features. In
addition, they are both in assembly and with separate implementations
for 32 and 64 bits. identify_cpu() is also implemented in assembly and
separately for 32 and 64 bits.

This patch replaces them with a pair of C functions. The call sites are
slightly moved on ppc64 as well to be called from C instead of from
assembly, though it's a very small change, and thus shouldn't cause any
problem.

Signed-off-by: Benjamin Herrenschmidt 
Acked-by: Olof Johansson 
Signed-off-by: Paul Mackerras

[PATCH] provide kernel_execve on all architectures

2006-10-02T14:57:23+00:00

This adds the new kernel_execve function on all architectures that were using
_syscall3() to implement execve.

The implementation uses code from the _syscall3 macros provided in the
unistd.h header file.  I don't have cross-compilers for any of these
architectures, so the patch is untested with the exception of i386.

Most architectures can probably implement this in a nicer way in assembly or
by combining it with the sys_execve implementation itself, but this should do
it for now.

[bunk@stusta.de: m68knommu build fix]
[markh@osdl.org: build fix]
[bero@arklinux.org: build fix]
[ralf@linux-mips.org: mips fix]
[schwidefsky@de.ibm.com: s390 fix]
Signed-off-by: Arnd Bergmann 
Cc: Andi Kleen 
Cc: Paul Mackerras 
Cc: Benjamin Herrenschmidt 
Cc: Richard Henderson 
Cc: Ivan Kokshaysky 
Cc: Russell King 
Cc: Ian Molton 
Cc: Mikael Starvik 
Cc: David Howells 
Cc: Yoshinori Sato 
Cc: Hirokazu Takata 
Cc: Ralf Baechle 
Cc: Kyle McMartin 
Cc: Heiko Carstens 
Cc: Martin Schwidefsky 
Cc: Paul Mundt 
Cc: Kazumoto Kojima 
Cc: Richard Curnow 
Cc: William Lee Irwin III 
Cc: "David S. Miller" 
Cc: Jeff Dike 
Cc: Paolo 'Blaisorblade' Giarrusso 
Cc: Miles Bader 
Cc: Chris Zankel 
Cc: "Luck, Tony" 
Cc: Geert Uytterhoeven 
Cc: Roman Zippel 
Signed-off-by: Ralf Baechle 
Signed-off-by: Bernhard Rosenkraenzer 
Signed-off-by: Mark Haverkamp 
Signed-off-by: Adrian Bunk 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds

[POWERPC] clean up ide io accessors

2006-09-20T04:06:18+00:00

Signed-off-by: Stephen Rothwell

[POWERPC] remove unused asm routines

2006-09-20T04:06:18+00:00

_insw, _outsw, _insl amd _outsl are all unused, so remove them.

Signed-off-by: Stephen Rothwell

Remove obsolete #include

2006-06-30T17:25:36+00:00

Signed-off-by: Jörn Engel 
Signed-off-by: Adrian Bunk

ppc: Use the system call table from arch/powerpc/kernel/systbl.S

2006-02-10T05:02:20+00:00

With this, new system calls only have to be wired up in one place
for ARCH=ppc and ARCH=powerpc, rather than 2.

Signed-off-by: Paul Mackerras

[PATCH] ppc: Remove powermac support from ARCH=ppc

2006-01-15T06:30:44+00:00

This makes it possible to build kernels for PReP and/or CHRP
with ARCH=ppc by removing the (non-building) powermac support.
It's now also possible to select PReP and CHRP independently.
Powermac users should now build with ARCH=powerpc instead of
ARCH=ppc.  (This does mean that it is no longer possible to
build a 32-bit kernel for a G5.)

Signed-off-by: Paul Mackerras

[PATCH] ppc: Make ARCH=ppc build again with new syscall path

2006-01-09T03:50:55+00:00

This makes ARCH=ppc build in your powerpc tree again, with the new
syscall entry/exit path.

Still doesn't actually boot on my Pegasos; the last thing I see is
'MMU:exit'. But at least it builds -- I'll look at why it doesn't boot
later, so that I can see if the mv643xx_eth actually works with ARCH=ppc
(it doesn't with ARCH=powerpc; two in every three packets I receive are
offset by 4 bytes).

Signed-off-by: David Woodhouse 
Signed-off-by: Paul Mackerras

[PATCH] powerpc: Merge cacheflush.h and cache.h

2005-11-10T02:09:22+00:00

The ppc32 and ppc64 versions of cacheflush.h were almost identical.
The two versions of cache.h are fairly similar, except for a bunch of
register definitions in the ppc32 version which probably belong better
elsewhere.  This patch, therefore, merges both headers.  Notable
points:
	- there are several functions in cacheflush.h which exist only
on ppc32 or only on ppc64.  These are handled by #ifdef for now, but
these should probably be consolidated, along with the actual code
behind them later.
	- Confusingly, both ppc32 and ppc64 have a
flush_dcache_range(), but they're subtly different: it uses dcbf on
ppc32 and dcbst on ppc64, ppc64 has a flush_inval_dcache_range() which
uses dcbf.  These too should be merged and consolidated later.
	- Also flush_dcache_range() was defined in cacheflush.h on
ppc64, and in cache.h on ppc32.  In the merged version it's in
cacheflush.h
	- On ppc32 flush_icache_range() is a normal function from
misc.S.  On ppc64, it was wrapper, testing a feature bit before
calling __flush_icache_range() which does the actual flush.  This
patch takes the ppc64 approach, which amounts to no change on ppc32,
since CPU_FTR_COHERENT_ICACHE will never be set there, but does mean
renaming flush_icache_range() to __flush_icache_range() in
arch/ppc/kernel/misc.S and arch/powerpc/kernel/misc_32.S
	- The PReP register info from asm-ppc/cache.h has moved to
arch/ppc/platforms/prep_setup.c
	- The 8xx register info from asm-ppc/cache.h has moved to a
new asm-powerpc/reg_8xx.h, included from reg.h
	- flush_dcache_all() was defined on ppc32 (only), but was
never called (although it was exported).  Thus this patch removes it
from cacheflush.h and from ARCH=powerpc (misc_32.S) entirely.  It's
left in ARCH=ppc for now, with the prototype moved to ppc_ksyms.c.

Built for Walnut (ARCH=ppc), 32-bit multiplatform (pmac, CHRP and PReP
ARCH=ppc, pmac and CHRP ARCH=powerpc).  Built and booted on POWER5
LPAR (ARCH=powerpc and ARCH=ppc64).

Built for 32-bit powermac (ARCH=ppc and ARCH=powerpc).  Built and
booted on POWER5 LPAR (ARCH=powerpc and ARCH=ppc64).  Built and booted
on G5 (ARCH=powerpc)

Signed-off-by: David Gibson 
Signed-off-by: Paul Mackerras

[PATCH] ppc32: handle access to non-present IO ports on 8xx

2005-11-07T01:37:12+00:00

This adds exception table entries for I/O instructions on and
changes MachineCheckException() slightly to cover 8xx specifics (on
8xx the MCE can be generated while executing the IO access instruction
itself, which is not the case on PowerMac's, as the comment on traps.c
details).

Signed-off-by: Marcelo Tosatti 
Signed-off-by: Paul Mackerras