linux.git/arch/ppc/kernel/cputable.c, branch v2.6.14

[PATCH] ppc32: Tell userland about lack of standard TB

2005-10-12T15:24:47+00:00

Glibc is about to get some new high precision timer stuff that relies on
the standard timebase of the PPC architecture.

However, some (rare & old) CPUs do not have such timebase and it is a
bit annoying to have your stuff just crash because you are running on
the wrong CPU...

This exposes to userland a CPU feature bit that tells that the current
processor doesn't have a standard timebase.  It's negative logic so that
glibc will still "just work" on older kernels (it will just be unhappy
on those old CPUs but that doesn't really matter as distro tend to
update glibc & kernel at the same time).

Signed-off-by: Benjamin Herrenschmidt 
Signed-off-by: Linus Torvalds

[PATCH] ppc32: Added cputable entry for 7448

2005-09-05T07:06:00+00:00

Added cputable entry for 7448 as well adding it to checks for saving and
restoring of cpu state.

Signed-off-by: Kumar Gala 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds

[PATCH] ppc32: Add cputable entry for 750CXe DD2.4 ("Gekko")

2005-09-05T07:05:59+00:00

Add a table entry for 750CXe DD2.4 ("Gekko") as found in the GameCube from
Nintendo:

  http://www-306.ibm.com/chips/techlib/techlib.nsf/techdocs/291C8D0EF3EAEC1687256B72005C745C#C1

Signed-off-by: Arthur Othieno 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds

[PATCH] ppc32: Re-order cputable for 750CXe DD2.4 entry

2005-09-05T07:05:59+00:00

"745/755" (pvr_value:0x00083000) is a catch-all entry.
Since arch/ppc/kernel/misc.S:identify_cpu() returns on first match,
move this lower in the table so 750CXe DD2.4 (pvr_value:0x00083214)
may be correctly enumerated.

Signed-off-by: Arthur Othieno 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds

[PATCH] ppc32: add cputable entry for 440SP Rev. A

2005-09-05T07:05:57+00:00

Adds the appropriate cputable entry for PPC440SP so cache line sizes are
configured correctly.

Signed-off-by: Matt Porter 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds

[PATCH] ppc32: add 440GX rev.F cputable entry

2005-09-05T07:05:57+00:00

Add PowerPC 440GX rev.F cputable entry.

Signed-off-by: Eugene Surovegin 
Cc: Benjamin Herrenschmidt 
Cc: Matt Porter 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds

[PATCH] ppc32: add 440ep support

2005-08-02T02:14:01+00:00

Add PPC440EP core support.  PPC440EP is a PPC440-based SoC with a classic PPC
FPU and another set of peripherals.

Signed-off-by: Wade Farnsworth 
Signed-off-by: Matt Porter 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds

[PATCH] ppc32: Add support for Freescale e200 (Book-E) core

2005-06-25T23:24:26+00:00

The e200 core is a Book-E core (similar to e500) that has a unified L1 cache
and is not cache coherent on the bus.  The e200 core also adds a separate
exception level for debug exceptions.  Part of this patch helps to cleanup a
few cases that are true for all Freescale Book-E parts, not just e500.

Signed-off-by: Kim Phillips 
Signed-off-by: Kumar Gala 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds

[PATCH] ppc32: Added support for new MPC8548 family of PowerQUICC III processors

2005-06-22T01:46:23+00:00

Added descriptions of the new MPC8548 family processors, e500 core and
peripherals.

Signed-off-by: Kumar Gala 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds

ppc: remove two extraneous descriptors for the 405EP CPU

2005-06-10T16:37:21+00:00

The patch to add them keeps on getting applied, over and
over again ;)

Hopefully no more.