linux.git/arch/powerpc/sysdev/Makefile, branch v2.6.30

powerpc: Implement GPIO driver for simple memory-mapped banks

2008-12-30T17:13:45+00:00

The driver supports very simple GPIO controllers, that is, when a
controller provides just a 'data' register. Such controllers may be
found in various BCSRs (Board's FPGAs used to control board's
switches, LEDs, chip-selects, Ethernet/USB PHY power, etc).

So far we support only 1-byte GPIO banks. Support for other widths may
be implemented when/if needed.

p.s.
To avoid "made up" compatible entries (like compatible = "simple-gpio"),
boards must call simple_gpiochip_init() to pass the compatible string.

Signed-off-by: Anton Vorontsov 
Signed-off-by: Kumar Gala

powerpc/4xx: Add PowerPC 4xx GPIO driver

2008-10-17T17:33:44+00:00

This patch adds support for the GPIO functions of PPC40x and PPC44x
SOCs.

Signed-off-by: Steve Falco 
Acked-by: Stefan Roese 
Acked-by: Sean MacLennan 
Signed-off-by: Josh Boyer

powerpc: Remove old Makefile workaround for arch/ppc

2008-10-12T23:56:18+00:00

There is an old workaround in the sysdev/Makefile for dealing
with arch/ppc vs. arch/powerpc compiles.  This is no longer
needed as arch/ppc is dead.

Signed-off-by: Josh Boyer 
Acked-by: Kumar Gala 
Signed-off-by: Benjamin Herrenschmidt

powerpc: gpio driver for mpc8349/8572/8610 and compatible

2008-09-23T15:41:16+00:00

Structured similar to the existing QE GPIO support.

Signed-off-by: Peter Korsgaard 
Acked-by: Anton Vorontsov 
Signed-off-by: Kumar Gala

powerpc: Split-out common MSI bitmap logic into msi_bitmap.c

2008-08-20T06:34:57+00:00

There are now two almost identical implementations of an MSI bitmap
allocator, one in mpic_msi.c and the other in fsl_msi.c.

Merge them together and put the result in msi_bitmap.c.  Some of the
MPIC bits will remain to provide a nicer interface for the MPIC users.

In the process we fix two buglets.  The first is that the allocation
routines, now msi_bitmap_alloc_hwirqs(), returned an unsigned result,
even though they use -1 to indicate allocation failure.  Although all
the callers were checking correctly, it is much better for the routine
to just return an int.  At least until someone wants > ~2 billion MSIs.

The second buglet is that the device tree reservation logic only
allowed power-of-two reservations.  AFAICT that didn't effect any
existing code but it's nicer if we can reserve arbitrary irqs from MSI
use.

We also add some selftests, which exposed the two buglets and now test
for them, as well as some basic sanity tests.  The tests are only built
when CONFIG_DEBUG_KERNEL=y.

Signed-off-by: Michael Ellerman 
Signed-off-by: Paul Mackerras

powerpc: Remove use of CONFIG_PPC_MERGE

2008-08-04T03:18:17+00:00

Now that arch/ppc is gone and CONFIG_PPC_MERGE is always set, remove
the dead code associated with !CONFIG_PPC_MERGE from arch/powerpc
and include/asm-powerpc.

Signed-off-by: Kumar Gala 
Signed-off-by: Paul Mackerras

powerpc/QE: switch to the cpm_muram implementation

2008-06-10T16:11:21+00:00

This is very trivial patch. We're transitioning to the cpm_muram_*
calls. That's it.

Less trivial changes:
- BD_SC_* defines were defined in the cpm.h and qe.h, so to avoid redefines
  we remove BD_SC from the qe.h and use cpm.h along with cpm_muram_*
  prototypes;
- qe_muram_dump was unused and thus removed;
- added some code to the cpm_common.c to support legacy QE bindings
  (data-only node name).
- For convenience, define qe_* calls to cpm_*. So drivers need not to be
  changed.

Signed-off-by: Anton Vorontsov 
Signed-off-by: Kumar Gala

powerpc/sysdev: implement FSL GTM support

2008-06-10T15:38:50+00:00

GTM stands for General-purpose Timers Module and able to generate
timer{1,2,3,4} interrupts. These timers are used by the drivers that
need time precise interrupts (like for USB transactions scheduling for
the Freescale USB Host controller as found in some QE and CPM chips),
or these timers could be used as wakeup events from the CPU deep-sleep
mode.

Things unimplemented:
1. Cascaded (32 bit) timers (1-2, 3-4).
   This is straightforward to implement when needed, two timers should
   be marked as "requested" and configured as appropriate.
2. Super-cascaded (64 bit) timers (1-2-3-4).
   This is also straightforward to implement when needed, all timers
   should be marked as "requested" and configured as appropriate.

Signed-off-by: Anton Vorontsov 
Signed-off-by: Kumar Gala

[POWERPC] fsl: PCIe MSI support for 83xx/85xx/86xx processors.

2008-06-02T19:44:24+00:00

This MSI driver can be used on 83xx/85xx/86xx board.
In this driver, virtual interrupt host and chip were
setup. There are 256 MSI interrupts in this host, Every 32
MSI interrupts cascaded to one IPIC/MPIC interrupt.
The chip was treated as edge sensitive and some necessary
functions were setup for this chip.

Before using the MSI interrupt, PCI/PCIE device need to
ask for a MSI interrupt in the 256 MSI interrupts. A 256bit
bitmap show which MSI interrupt was used, reserve bit in
the bitmap can be used to force the device use some designate
MSI interrupt in the 256 MSI interrupts. Sometimes this is useful
for testing the all the MSI interrupts. The msi-available-ranges
property in the dts file was used for this purpose.

Signed-off-by: Jason Jin 
Signed-off-by: Kumar Gala

[POWERPC] Add 6xx-style HID0_SLEEP support.

2008-05-16T13:22:28+00:00

This adds a function to put a 6xx/7xx/7xxx/83xx family CPU into sleep
mode, and return after an interrupt has occurred.  It expects to be
called with interrupts disabled, and returns with interrupts disabled.
Interrupts are enabled while the processor is asleep, but the interrupt
that wakes the processor is not handled; it is still pending when this
function returns.

Signed-off-by: Scott Wood 
Signed-off-by: Guennadi Liakhovetski 
Signed-off-by: Paul Mackerras