<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/arch/powerpc/sysdev/Makefile, branch v2.6.25</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>[POWERPC] CPM: Rename commproc to cpm1 and cpm2_common.c to cpm2.c</title>
<updated>2008-01-28T14:31:05+00:00</updated>
<author>
<name>Jochen Friedrich</name>
<email>jochen@scram.de</email>
</author>
<published>2008-01-25T14:31:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=b5677d848cbb94220ac2cfd36d93bcdbe49c3280'/>
<id>b5677d848cbb94220ac2cfd36d93bcdbe49c3280</id>
<content type='text'>
Rename commproc.[ch] to cpm1.[ch] to be more consistent with cpm2. Also
rename cpm2_common.c to cpm2.c as suggested by Scott Wood. Adjust the
includes accordingly.

Signed-off-by: Jochen Friedrich &lt;jochen@scram.de&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Rename commproc.[ch] to cpm1.[ch] to be more consistent with cpm2. Also
rename cpm2_common.c to cpm2.c as suggested by Scott Wood. Adjust the
includes accordingly.

Signed-off-by: Jochen Friedrich &lt;jochen@scram.de&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[POWERPC] Enable RTC for Ebony and Walnut (v2)</title>
<updated>2008-01-25T13:07:26+00:00</updated>
<author>
<name>David Gibson</name>
<email>dwg@au1.ibm.com</email>
</author>
<published>2008-01-11T03:25:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=22258fa40e54ceefe75a6c6a793f5c44d8339b9c'/>
<id>22258fa40e54ceefe75a6c6a793f5c44d8339b9c</id>
<content type='text'>
This patch extends the Ebony and Walnut platform code to instantiate
the existing ds1742 RTC class driver for the DS1743 RTC/NVRAM chip
found on both those boards.  The patch uses a helper function to scan
the device tree and instantiate the appropriate platform_device based
on it, so it should be easy to extend for other boards which have mmio
mapped RTC chips.

Along with this, the device tree binding for the ds1743 chips is
tweaked, based on the existing DS1385 OF binding found at:
	http://playground.sun.com/1275/proposals/Closed/Remanded/Accepted/346-it.txt
Although that document covers the NVRAM portion of the chip, whereas
here we're interested in the RTC portion, so it's not entirely clear
if that's a good model.

This implements only RTC class driver support - that is /dev/rtc0, not
/dev/rtc, and the low-level get/set time callbacks remain
unimplemented.  That means in order to get at the clock you will
either need a modified version of hwclock which will look at
/dev/rtc0, or you'll need to configure udev to symlink rtc0 to rtc.

Signed-off-by: David Gibson &lt;david@gibson.dropbear.id.au&gt;
Signed-off-by: Josh Boyer &lt;jwboyer@linux.vnet.ibm.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch extends the Ebony and Walnut platform code to instantiate
the existing ds1742 RTC class driver for the DS1743 RTC/NVRAM chip
found on both those boards.  The patch uses a helper function to scan
the device tree and instantiate the appropriate platform_device based
on it, so it should be easy to extend for other boards which have mmio
mapped RTC chips.

Along with this, the device tree binding for the ds1743 chips is
tweaked, based on the existing DS1385 OF binding found at:
	http://playground.sun.com/1275/proposals/Closed/Remanded/Accepted/346-it.txt
Although that document covers the NVRAM portion of the chip, whereas
here we're interested in the RTC portion, so it's not entirely clear
if that's a good model.

This implements only RTC class driver support - that is /dev/rtc0, not
/dev/rtc, and the low-level get/set time callbacks remain
unimplemented.  That means in order to get at the clock you will
either need a modified version of hwclock which will look at
/dev/rtc0, or you'll need to configure udev to symlink rtc0 to rtc.

Signed-off-by: David Gibson &lt;david@gibson.dropbear.id.au&gt;
Signed-off-by: Josh Boyer &lt;jwboyer@linux.vnet.ibm.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[POWERPC] Move RapidIO support code from arch/ppc</title>
<updated>2008-01-24T01:35:15+00:00</updated>
<author>
<name>Kumar Gala</name>
<email>galak@kernel.crashing.org</email>
</author>
<published>2008-01-23T12:12:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=de3c8d41828553fa4cbba0399826e20a02670663'/>
<id>de3c8d41828553fa4cbba0399826e20a02670663</id>
<content type='text'>
Do just enough to move the RapidIO support code for 85xx over from arch/ppc
into arch/powerpc and make it still build.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Do just enough to move the RapidIO support code for 85xx over from arch/ppc
into arch/powerpc and make it still build.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[POWERPC] Add IPIC Kconfig option</title>
<updated>2008-01-24T01:34:26+00:00</updated>
<author>
<name>John Rigby</name>
<email>jrigby@freescale.com</email>
</author>
<published>2008-01-18T00:05:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=b0bbad60680a5e76067eb1e55c3676b28abe7481'/>
<id>b0bbad60680a5e76067eb1e55c3676b28abe7481</id>
<content type='text'>
IPIC is not just for 83xx anymore so make it a separate config option.

Signed-off-by: John Rigby &lt;jrigby@freescale.com&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
IPIC is not just for 83xx anymore so make it a separate config option.

Signed-off-by: John Rigby &lt;jrigby@freescale.com&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[POWERPC] 4xx: PLB to PCI-X support</title>
<updated>2007-12-23T19:12:20+00:00</updated>
<author>
<name>Benjamin Herrenschmidt</name>
<email>benh@kernel.crashing.org</email>
</author>
<published>2007-12-21T04:39:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=5738ec6d00b7abbcd4cd342af83fd18d192b0979'/>
<id>5738ec6d00b7abbcd4cd342af83fd18d192b0979</id>
<content type='text'>
This adds base support code for the 4xx PCI-X bridge. It also provides
placeholders for the PCI and PCI-E version but they aren't supported
with this patch.

The bridges are configured based on device-tree properties.

Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Signed-off-by: Josh Boyer &lt;jwboyer@linux.vnet.ibm.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This adds base support code for the 4xx PCI-X bridge. It also provides
placeholders for the PCI and PCI-E version but they aren't supported
with this patch.

The bridges are configured based on device-tree properties.

Signed-off-by: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Signed-off-by: Josh Boyer &lt;jwboyer@linux.vnet.ibm.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[POWERPC] pasemi: Implement MSI support</title>
<updated>2007-12-20T05:15:23+00:00</updated>
<author>
<name>Olof Johansson</name>
<email>olof@lixom.net</email>
</author>
<published>2007-12-12T06:44:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=38958dd9113c19cd7a927009ae585bd5aba3295e'/>
<id>38958dd9113c19cd7a927009ae585bd5aba3295e</id>
<content type='text'>
Implement MSI support for PA Semi PWRficient platforms. MSI is done
through a special range of sources on the openpic controller, and they're
unfortunately breaking the usual concepts of how sources are programmed:

* The source is calculated as 512 + the value written into the MSI
  register
* The vector for this source is added to the source and reported
  through IACK

This means that for simplicity, it makes much more sense to just set the
vector to 0 for the source, since that's really the vector we expect to
see from IACK.

Also, the affinity/priority registers will affect 16 sources at a
time. To avoid most (simple) users from being limited by this, allocate
16 sources per device but use only one. This means that there's a total
of 32 sources.

If we get usage scenarions that need more sources, the allocator should
probably be revised to take an alignment argument and size, not just do
natural alignment.

Finally, since I'm already touching the MPIC names on pasemi, rename
the base one from the somewhat odd " PAS-OPIC  " to "PASEMI-OPIC".

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
Acked-by: Michael Ellerman &lt;michael@ellerman.id.au&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Implement MSI support for PA Semi PWRficient platforms. MSI is done
through a special range of sources on the openpic controller, and they're
unfortunately breaking the usual concepts of how sources are programmed:

* The source is calculated as 512 + the value written into the MSI
  register
* The vector for this source is added to the source and reported
  through IACK

This means that for simplicity, it makes much more sense to just set the
vector to 0 for the source, since that's really the vector we expect to
see from IACK.

Also, the affinity/priority registers will affect 16 sources at a
time. To avoid most (simple) users from being limited by this, allocate
16 sources per device but use only one. This means that there's a total
of 32 sources.

If we get usage scenarions that need more sources, the allocator should
probably be revised to take an alignment argument and size, not just do
natural alignment.

Finally, since I'm already touching the MPIC names on pasemi, rename
the base one from the somewhat odd " PAS-OPIC  " to "PASEMI-OPIC".

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
Acked-by: Michael Ellerman &lt;michael@ellerman.id.au&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[POWERPC] bestcomm: core bestcomm support for Freescale MPC5200</title>
<updated>2007-10-16T23:09:34+00:00</updated>
<author>
<name>Sylvain Munaut</name>
<email>tnt@246tNt.com</email>
</author>
<published>2007-09-16T10:53:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=2f9ea1bde0d12d8fb5a7bdc7ab6834275d456262'/>
<id>2f9ea1bde0d12d8fb5a7bdc7ab6834275d456262</id>
<content type='text'>
This patch adds support for the core of the BestComm API
for the Freescale MPC5200(b). The BestComm engine is a
microcode-controlled / tasks-based DMA used by several
of the onchip devices.

Setting up the tasks / memory allocation and all common
low level functions are handled by this patch.
The specifics details of each tasks and their microcode
are split-out in separate patches.

This is not the official API, but a much cleaner one.
(hopefully)

Signed-off-by: Sylvain Munaut &lt;tnt@246tNt.com&gt;
Signed-off-by: Grant Likely &lt;grant.likely@secretlab.ca&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds support for the core of the BestComm API
for the Freescale MPC5200(b). The BestComm engine is a
microcode-controlled / tasks-based DMA used by several
of the onchip devices.

Setting up the tasks / memory allocation and all common
low level functions are handled by this patch.
The specifics details of each tasks and their microcode
are split-out in separate patches.

This is not the official API, but a much cleaner one.
(hopefully)

Signed-off-by: Sylvain Munaut &lt;tnt@246tNt.com&gt;
Signed-off-by: Grant Likely &lt;grant.likely@secretlab.ca&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[POWERPC] Don't build arch/powerpc/sysdev/dcr.c for ARCH=ppc kernels</title>
<updated>2007-10-10T15:14:35+00:00</updated>
<author>
<name>Grant Likely</name>
<email>grant.likely@secretlab.ca</email>
</author>
<published>2007-10-04T21:44:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=4c3d514d7e5b394d1df76201aada8956c9605882'/>
<id>4c3d514d7e5b394d1df76201aada8956c9605882</id>
<content type='text'>
dcr.c is an arch/powerpc only thing.  Compiling ppc405 arch/ppc kernels
throws warnings without this change.

Signed-off-by: Grant Likely &lt;grant.likely@secretlab.ca&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
dcr.c is an arch/powerpc only thing.  Compiling ppc405 arch/ppc kernels
throws warnings without this change.

Signed-off-by: Grant Likely &lt;grant.likely@secretlab.ca&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[POWERPC] Add early debug console for CPM serial ports.</title>
<updated>2007-10-04T01:35:43+00:00</updated>
<author>
<name>Scott Wood</name>
<email>scottwood@freescale.com</email>
</author>
<published>2007-07-16T16:43:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=c374e00e17f1c10768d5af922a1ff33e43df2eb0'/>
<id>c374e00e17f1c10768d5af922a1ff33e43df2eb0</id>
<content type='text'>
This code assumes that the ports have been previously set up, with
buffers in DPRAM.

Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
Acked-by: David Gibson &lt;david@gibson.dropbear.id.au&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This code assumes that the ports have been previously set up, with
buffers in DPRAM.

Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
Acked-by: David Gibson &lt;david@gibson.dropbear.id.au&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[POWERPC] Virtex: add xilinx interrupt controller driver</title>
<updated>2007-10-03T12:23:14+00:00</updated>
<author>
<name>Grant Likely</name>
<email>grant.likely@secretlab.ca</email>
</author>
<published>2007-10-02T02:15:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=4dc9783ea9e4d6f97e40b808991b324a4719a837'/>
<id>4dc9783ea9e4d6f97e40b808991b324a4719a837</id>
<content type='text'>
Adds support for the Xilinx opb-intc interrupt controller

Signed-off-by: Grant Likely &lt;grant.likely@secretlab.ca&gt;
Signed-off-by: Josh Boyer &lt;jwboyer@linux.vnet.ibm.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Adds support for the Xilinx opb-intc interrupt controller

Signed-off-by: Grant Likely &lt;grant.likely@secretlab.ca&gt;
Signed-off-by: Josh Boyer &lt;jwboyer@linux.vnet.ibm.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
