linux.git/arch/powerpc/kvm, branch v3.8

KVM: PPC: Emulate dcbf

2013-01-17T23:40:49+00:00

Guests can trigger MMIO exits using dcbf. Since we don't emulate cache
incoherent MMIO, just do nothing and move on.

Reported-by: Ben Collins 
Signed-off-by: Alexander Graf 
Tested-by: Ben Collins 
CC: stable@vger.kernel.org

KVM: PPC: Book3S HV: Fix compilation without CONFIG_PPC_POWERNV

2013-01-06T13:02:00+00:00

Fixes this build breakage:

arch/powerpc/kvm/book3s_hv_ras.c: In function ‘kvmppc_realmode_mc_power7’:
arch/powerpc/kvm/book3s_hv_ras.c:126:23: error: ‘struct paca_struct’ has no member named ‘opal_mc_evt’

Signed-off-by: Andreas Schwab 
Signed-off-by: Alexander Graf

KVM: PPC: booke: Get/set guest EPCR register using ONE_REG interface

2012-12-06T00:34:20+00:00

Implement ONE_REG interface for EPCR register adding KVM_REG_PPC_EPCR to
the list of ONE_REG PPC supported registers.

Signed-off-by: Mihai Caraman 
[agraf: remove HV dependency, use get/put_user]
Signed-off-by: Alexander Graf

KVM: PPC: bookehv: Add EPCR support in mtspr/mfspr emulation

2012-12-06T00:34:19+00:00

Add EPCR support in booke mtspr/mfspr emulation. EPCR register is defined only
for 64-bit and HV categories, we will expose it at this point only to 64-bit
virtual processors running on 64-bit HV hosts.
Define a reusable setter function for vcpu's EPCR.

Signed-off-by: Mihai Caraman 
[agraf: move HV dependency in the code]
Signed-off-by: Alexander Graf

KVM: PPC: bookehv: Add guest computation mode for irq delivery

2012-12-06T00:34:18+00:00

When delivering guest IRQs, update MSR computation mode according to guest
interrupt computation mode found in EPCR.

Signed-off-by: Mihai Caraman 
[agraf: remove HV dependency in the code]
Signed-off-by: Alexander Graf

KVM: PPC: booke: Extend MAS2 EPN mask for 64-bit

2012-12-06T00:34:15+00:00

Extend MAS2 EPN mask to retain most significant bits on 64-bit hosts.
Use this mask in tlb effective address accessor.

Signed-off-by: Mihai Caraman 
Signed-off-by: Alexander Graf

KVM: PPC: e500: Mask MAS2 EPN high 32-bits in 32/64 tlbwe emulation

2012-12-06T00:34:14+00:00

Mask high 32 bits of MAS2's effective page number in tlbwe emulation for guests
running in 32-bit mode.

Signed-off-by: Mihai Caraman 
Signed-off-by: Alexander Graf

KVM: PPC: e500: Add emulation helper for getting instruction ea

2012-12-06T00:34:12+00:00

Add emulation helper for getting instruction ea and refactor tlb instruction
emulation to use it.

Signed-off-by: Mihai Caraman 
[agraf: keep rt variable around]
Signed-off-by: Alexander Graf

KVM: PPC: bookehv64: Add support for interrupt handling

2012-12-06T00:34:11+00:00

Add interrupt handling support for 64-bit bookehv hosts. Unify 32 and 64 bit
implementations using a common stack layout and a common execution flow starting
from kvm_handler_common macro. Update documentation for 64-bit input register
values. This patch only address the bolted TLB miss exception handlers version.

Signed-off-by: Mihai Caraman 
Signed-off-by: Alexander Graf

KVM: PPC: bookehv: Remove GET_VCPU macro from exception handler

2012-12-06T00:34:10+00:00

GET_VCPU define will not be implemented for 64-bit for performance reasons
so get rid of it also on 32-bit.

Signed-off-by: Mihai Caraman 
Signed-off-by: Alexander Graf