linux.git/arch/powerpc/kernel/sysfs.c, branch v4.19 Linux kernel source tree Merge branch 'topic/paca' into next 2018-03-30T22:09:36+00:00 Michael Ellerman mpe@ellerman.id.au 2018-03-30T13:11:24+00:00 f437c51748fa1dd423a878c870ad203843a51c8d Bring in yet another series that touches KVM code, and might need to be merged into the kvm-ppc branch to resolve conflicts. This required some changes in pnv_power9_force_smt4_catch/release() due to the paca array becomming an array of pointers. 
Bring in yet another series that touches KVM code, and might need to
be merged into the kvm-ppc branch to resolve conflicts.

This required some changes in pnv_power9_force_smt4_catch/release()
due to the paca array becomming an array of pointers.
powerpc/64: move default SPR recording 2018-03-30T12:34:26+00:00 Nicholas Piggin npiggin@gmail.com 2018-02-13T15:08:17+00:00 c0abd0c745bdabe027a8f013a866f385fba717b1 Move this into the early setup code, and don't iterate over CPU masks. We don't want to call into sysfs so early from setup, and a future patch won't initialize CPU masks by the time this is called. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> [mpe: Fold in incremental fix from Nick for DSCR handling] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> 
Move this into the early setup code, and don't iterate over CPU masks.
We don't want to call into sysfs so early from setup, and a future patch
won't initialize CPU masks by the time this is called.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
[mpe: Fold in incremental fix from Nick for DSCR handling]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
powerpc/64: Use array of paca pointers and allocate pacas individually 2018-03-30T12:34:23+00:00 Nicholas Piggin npiggin@gmail.com 2018-02-13T15:08:12+00:00 d2e60075a3d4422dc54b919f3b125d8066b839d4 Change the paca array into an array of pointers to pacas. Allocate pacas individually. This allows flexibility in where the PACAs are allocated. Future work will allocate them node-local. Platforms that don't have address limits on PACAs would be able to defer PACA allocations until later in boot rather than allocate all possible ones up-front then freeing unused. This is slightly more overhead (one additional indirection) for cross CPU paca references, but those aren't too common. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> 
Change the paca array into an array of pointers to pacas. Allocate
pacas individually.

This allows flexibility in where the PACAs are allocated. Future work
will allocate them node-local. Platforms that don't have address limits
on PACAs would be able to defer PACA allocations until later in boot
rather than allocate all possible ones up-front then freeing unused.

This is slightly more overhead (one additional indirection) for cross
CPU paca references, but those aren't too common.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
powerpc: Expose TSCR via sysfs only on powernv 2018-02-14T22:54:42+00:00 Cyril Bur cyrilbur@gmail.com 2018-02-14T03:27:06+00:00 c134f0d57a47b7f8704dee1cefc246f9471f3e80 The TSCR can only be accessed in hypervisor mode. Fixes: 88b5e12eeb11 ("powerpc: Expose TSCR via sysfs") Signed-off-by: Cyril Bur <cyrilbur@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> 
The TSCR can only be accessed in hypervisor mode.

Fixes: 88b5e12eeb11 ("powerpc: Expose TSCR via sysfs")
Signed-off-by: Cyril Bur <cyrilbur@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
powerpc: Expose TSCR via sysfs 2018-01-21T18:48:36+00:00 Anton Blanchard anton@samba.org 2017-09-07T17:11:12+00:00 b6d34eb4d280c893d0f442f4b9e039d73e3db420 The thread switch control register (TSCR) is a per core register that configures how the CPU shares resources between SMT threads. Exposing it via sysfs allows us to tune it at run time. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> 
The thread switch control register (TSCR) is a per core register
that configures how the CPU shares resources between SMT threads.

Exposing it via sysfs allows us to tune it at run time.

Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
powerpc/64: Set DSCR default initially from SPR 2017-11-10T11:11:35+00:00 Nicholas Piggin npiggin@gmail.com 2017-10-24T11:44:44+00:00 1696d0fb7fcd18160c9cc92a3f2b2d68e6923dd8 Take the DSCR value set by firmware as the dscr_default value, rather than zero. POWER9 recommends DSCR default to a non-zero value. Signed-off-by: From: Nicholas Piggin <npiggin@gmail.com> [mpe: Make record_spr_defaults() __init] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> 
Take the DSCR value set by firmware as the dscr_default value,
rather than zero.

POWER9 recommends DSCR default to a non-zero value.

Signed-off-by: From: Nicholas Piggin <npiggin@gmail.com>
[mpe: Make record_spr_defaults() __init]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
powerpc/sysfs: Move #ifdef CONFIG_HOTPLUG_CPU out of the function body 2017-05-03T04:45:38+00:00 Michael Ellerman mpe@ellerman.id.au 2017-04-24T10:46:59+00:00 3f2290e1b5192fdfa74f012220a8d90067beb076 The entire body of unregister_cpu_online() is inside an #ifdef CONFIG_HOTPLUG_CPU block. This is ugly and means we create an empty function when hotplug is disabled for no reason. Instead move the #ifdef out of the function body and define the function to be NULL in the else case. This means we'll pass NULL to cpuhp_setup_state(), but that's fine because it accepts NULL to mean there is no teardown callback, which is exactly what we want. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> 
The entire body of unregister_cpu_online() is inside an #ifdef
CONFIG_HOTPLUG_CPU block. This is ugly and means we create an empty function
when hotplug is disabled for no reason.

Instead move the #ifdef out of the function body and define the function to be
NULL in the else case. This means we'll pass NULL to cpuhp_setup_state(), but
that's fine because it accepts NULL to mean there is no teardown callback, which
is exactly what we want.

Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
powerpc/sysfs: Fix reference leak of cpu device_nodes present at boot 2017-04-24T14:24:59+00:00 Tyrel Datwyler tyreld@linux.vnet.ibm.com 2017-04-18T00:24:39+00:00 e76ca27790a514590af782f83f6eae49e0ccf8c9 For CPUs present at boot each logical CPU acquires a reference to the associated device node of the core. This happens in register_cpu() which is called by topology_init(). The result of this is that we end up with a reference held by each thread of the core. However, these references are never freed if the CPU core is DLPAR removed. This patch fixes the reference leaks by acquiring and releasing the references in the CPU hotplug callbacks un/register_cpu_online(). With this patch symmetric reference counting is observed with both CPUs present at boot, and those DLPAR added after boot. Fixes: f86e4718f24b ("driver/core: cpu: initialize of_node in cpu's device struture") Cc: stable@vger.kernel.org # v3.12+ Signed-off-by: Tyrel Datwyler <tyreld@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> 
For CPUs present at boot each logical CPU acquires a reference to the
associated device node of the core. This happens in register_cpu() which
is called by topology_init(). The result of this is that we end up with
a reference held by each thread of the core. However, these references
are never freed if the CPU core is DLPAR removed.

This patch fixes the reference leaks by acquiring and releasing the references
in the CPU hotplug callbacks un/register_cpu_online(). With this patch symmetric
reference counting is observed with both CPUs present at boot, and those DLPAR
added after boot.

Fixes: f86e4718f24b ("driver/core: cpu: initialize of_node in cpu's device struture")
Cc: stable@vger.kernel.org # v3.12+
Signed-off-by: Tyrel Datwyler <tyreld@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
powerpc/sysfs: Convert to hotplug state machine 2016-11-22T22:34:42+00:00 Sebastian Andrzej Siewior bigeasy@linutronix.de 2016-11-17T18:35:37+00:00 977ab257a2b327f161728ab08bc618d770cc92ad Install the callbacks via the state machine and let the core invoke the callbacks on the already online CPUs. The previous convention of keeping the files around until the CPU is dead has not been preserved as there is no point to keep them available when the cpu is going down. This makes the hotplug call symmetric. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: rt@linuxtronix.de Cc: Paul Mackerras <paulus@samba.org> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: linuxppc-dev@lists.ozlabs.org Link: http://lkml.kernel.org/r/20161117183541.8588-17-bigeasy@linutronix.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de> 
Install the callbacks via the state machine and let the core invoke
the callbacks on the already online CPUs.

The previous convention of keeping the files around until the CPU is dead
has not been preserved as there is no point to keep them available when the
cpu is going down. This makes the hotplug call symmetric.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: rt@linuxtronix.de
Cc: Paul Mackerras <paulus@samba.org>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/20161117183541.8588-17-bigeasy@linutronix.de
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
powerpc/sparse: make some things static 2016-06-16T12:23:11+00:00 Daniel Axtens dja@axtens.net 2016-05-18T01:16:49+00:00 34852ed5511ec5d07897f22d5607061a248fc82f This is just a smattering of things picked up by sparse that should be made static. Signed-off-by: Daniel Axtens <dja@axtens.net> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> 
This is just a smattering of things picked up by sparse that should
be made static.

Signed-off-by: Daniel Axtens <dja@axtens.net>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>