linux.git/arch/powerpc/kernel/entry_32.S, branch v2.6.26

[POWERPC] Add IRQSTACKS support on ppc32

2008-04-29T05:57:34+00:00

This makes it possible to use separate stacks for hard and soft IRQs
on 32-bit powerpc as well as on 64-bit.  The code for 32-bit is just
the 32-bit analog of the 64-bit code.

* Added allocation and initialization of the irq stacks.  We limit the
  stacks to be in lowmem for ppc32.
* Implemented ppc32 versions of call_do_softirq() and call_handle_irq()
  to switch the stack pointers
* Reworked how we do stack overflow detection.  We now keep around the
  limit of the stack in the thread_struct and compare against the limit
  to see if we've overflowed.  We can now use this on ppc64 if desired.

[ paulus@samba.org: Fixed bug on 6xx where we need to reload r9 with the
  thread_info pointer. ]

Signed-off-by: Kumar Gala 
Signed-off-by: Paul Mackerras

[POWERPC] Make Book-E debug handling SMP safe

2008-04-17T06:01:40+00:00

global_dbcr0 needs to be a per cpu set of save areas instead of a single
global on all processors.

Also, we switch to using DBCR0_IDM to determine if the user space app is
being debugged as its a more consistent way.  In the future we should
support features like hardware breakpoint and watchpoints which will
have DBCR0_IDM set but not necessarily DBCR0_IC (single step).

Signed-off-by: Kumar Gala

[POWERPC] Avoid unpaired stwcx. on some processors

2007-11-13T05:22:43+00:00

The context switch code in the kernel issues a dummy stwcx. to clear the
reservation, as recommended by the architecture.  However, some processors
can have issues if this stwcx to address A occurs while the reservation
is already held to a different address B.  To avoid this problem, the dummy
stwcx. needs to be paired with a dummy lwarx to the same address.

This adds the dummy lwarx, and creates a cpu feature bit to indicate
which cpus are affected.  Tested on mpc8641_hpcn_defconfig in
arch/powerpc; build tested in arch/ppc.

Signed-off-by: Becky Bruce 
Signed-off-by: Paul Mackerras

[POWERPC] 4xx: Deal with 44x virtually tagged icache

2007-11-01T12:15:30+00:00

The 44x family has an interesting "feature" which is a virtually
tagged instruction cache (yuck !). So far, we haven't dealt with
it properly, which means we've been mostly lucky or people didn't
report the problems, unless people have been running custom patches
in their distro...

This is an attempt at fixing it properly. I chose to do it by
setting a global flag whenever we change a PTE that was previously
marked executable, and flush the entire instruction cache upon
return to user space when that happens.

This is a bit heavy handed, but it's hard to do more fine grained
flushes as the icbi instruction, on those processor, for some very
strange reasons (since the cache is virtually mapped) still requires
a valid TLB entry for reading in the target address space, which
isn't something I want to deal with.

Signed-off-by: Benjamin Herrenschmidt 
Signed-off-by: Josh Boyer

[POWERPC] Add cpu feature for SPE handling

2007-09-14T13:53:30+00:00

Make it so that SPE support can be determined at runtime.  This is similiar
to how we handle AltiVec.  This allows us to have SPE support built in and
work on processors with and without SPE.

Signed-off-by: Kumar Gala

[POWERPC] Fix COMMON symbol warnings

2007-05-17T11:10:15+00:00

We get the following warnings in various ARCH=powerpc builds:

WARNING: "ee_restarts" [arch/powerpc/kernel/built-in] is COMMON symbol
WARNING: "fee_restarts" [arch/powerpc/kernel/built-in] is COMMON symbol
WARNING: "htab_hash_searches" [arch/powerpc/mm/built-in] is COMMON symbol
WARNING: "next_slot" [arch/powerpc/mm/built-in] is COMMON symbol
WARNING: "mmu_hash_lock" [arch/powerpc/mm/built-in] is COMMON symbol
WARNING: "primary_pteg_full" [arch/powerpc/mm/built-in] is COMMON symbol
WARNING: "global_dbcr0" [arch/powerpc/kernel/built-in] is COMMON symbol

Switch to moving local symbols (except mmu_hash_lock which is global) and
space directive instead.

Signed-off-by: Kumar Gala

[POWERPC] Remove last_syscall

2007-03-22T11:52:58+00:00

Remove last_syscall from 32bit powerpc, its been gone in 64bit for years.

Signed-off-by: Anton Blanchard 
Signed-off-by: Paul Mackerras

Remove obsolete #include

2006-06-30T17:25:36+00:00

Signed-off-by: Jörn Engel 
Signed-off-by: Adrian Bunk

powerpc: Use correct sequence for putting CPU into nap mode

2006-04-18T11:49:11+00:00

We weren't using the recommended sequence for putting the CPU into
nap mode.  When I changed the idle loop, for some reason 7447A cpus
started hanging when we put them into nap mode.  Changing to the
recommended sequence fixes that.

The complexity here is that the recommended sequence is a loop that
keeps putting the cpu back into nap mode.  Clearly we need some way
to break out of the loop when an interrupt (external interrupt,
decrementer, performance monitor) occurs.  Here we use a bit in
the thread_info struct to indicate that we need this, and the exception
entry code notices this and arranges for the exception to return
to the value in the link register, thus breaking out of the loop.
We use a new `local_flags' field in the thread_info which we can
alter without needing to use an atomic update sequence.

The PPC970 has the same recommended sequence, so we do the same thing
there too.

This also fixes a bug in the kernel stack overflow handling code on
32-bit, since it was causing a value that we needed in a register to
get trashed.

Signed-off-by: Paul Mackerras

powerpc: Unify the 32 and 64 bit idle loops

2006-03-27T04:03:03+00:00

This unifies the 32-bit (ARCH=ppc and ARCH=powerpc) and 64-bit idle
loops.  It brings over the concept of having a ppc_md.power_save
function from 32-bit to ARCH=powerpc, which lets us get rid of
native_idle().  With this we will also be able to simplify the idle
handling for pSeries and cell.

Signed-off-by: Paul Mackerras