linux.git/arch/powerpc/kernel/cputable.c, branch v4.11

powerpc/64s: POWER9 machine check handler

2017-03-10T05:32:08+00:00

Add POWER9 machine check handler. There are several new types of errors
added, so logging messages for those are also added.

This doesn't attempt to reuse any of the P7/8 defines or functions,
because that becomes too complex. The better option in future is to use
a table driven approach.

Signed-off-by: Nicholas Piggin 
Signed-off-by: Michael Ellerman

powerpc: Add POWER9 architected mode to cputable

2017-02-17T10:48:56+00:00

PVR value of 0x0F000005 means we are arch v3.00 compliant (i.e. POWER9).

Acked-by: Michael Neuling 
Signed-off-by: Russell Currey 
[mpe: Don't set num_pmcs, so we keep the PMU fields from the raw entry]
Signed-off-by: Michael Ellerman

powerpc/8xx: add dedicated machine check handler

2016-09-25T07:38:55+00:00

During a machine check, the 8xx provides indication of
whether the check is due to data or instruction access, so
let's display it.

Lets also move 8xx specific handling into the new handler.

Signed-off-by: Christophe Leroy 
Signed-off-by: Scott Wood

powerpc/book3s: Add a cpu table entry for different POWER9 revs

2016-09-13T07:37:09+00:00

Signed-off-by: Aneesh Kumar K.V 
Acked-by: Michael Neuling 
Signed-off-by: Michael Ellerman

powerpc: Add option to use jump label for mmu_has_feature()

2016-08-01T01:15:06+00:00

As we just did for CPU features.

Signed-off-by: Kevin Hao 
Signed-off-by: Aneesh Kumar K.V 
Signed-off-by: Michael Ellerman

powerpc: Add option to use jump label for cpu_has_feature()

2016-08-01T01:15:05+00:00

We do binary patching of asm code using CPU features, which is a
one-time operation, done during early boot. However checks of CPU
features in C code are currently done at run time, even though the set
of CPU features can never change after boot.

We can optimise this by using jump labels to implement cpu_has_feature(),
meaning checks in C code are binary patched into a single nop or branch.

For a C sequence along the lines of:

    if (cpu_has_feature(FOO))
         return 2;

The generated code before is roughly:

    ld      r9,-27640(r2)
    ld      r9,0(r9)
    lwz     r9,32(r9)
    cmpwi   cr7,r9,0
    bge     cr7, 1f
    li      r3,2
    blr
1:  ...

After (true):
    nop
    li      r3,2
    blr

After (false):
    b	1f
    li      r3,2
    blr
1:  ...

mpe: Rename MAX_CPU_FEATURES as we already have a #define with that
name, and define it simply as a constant, rather than doing tricks with
sizeof and NULL pointers. Rename the array to cpu_feature_keys. Use the
kconfig we added to guard it. Add BUILD_BUG_ON() if the feature is not a
compile time constant. Rewrite the change log.

Signed-off-by: Kevin Hao 
Signed-off-by: Aneesh Kumar K.V 
Signed-off-by: Michael Ellerman

powerpc/mm: Clear top 16 bits of va only on older cpus

2016-07-17T06:42:52+00:00

As per ISA, we need to do this only for architecture version 2.02 and
earlier. This continued to work even for 2.07. But let's not do this for
anything after 2.02. ISA 3.0 requires these top bits to be not cleared.

Signed-off-by: Aneesh Kumar K.V 
Acked-by: Balbir Singh 
Signed-off-by: Michael Ellerman

powerpc: Remove unused remnants from A2 cpu

2016-05-11T11:54:00+00:00

Support for the A2 cpu was removed in commit fb5a515704d7 ("powerpc:
Remove platforms/wsp and associated pieces"), and the externs:
__setup_cpu_a2 and __restore_cpu_a2 are still around and unused, so
remove them.

Signed-off-by: Rashmica Gupta 
Signed-off-by: Michael Ellerman

powerpc/cache: add cache flush operation for various e500

2016-03-05T05:44:51+00:00

Various e500 core have different cache architecture, so they
need different cache flush operations. Therefore, add a callback
function cpu_flush_caches to the struct cpu_spec. The cache flush
operation for the specific kind of e500 is selected at init time.
The callback function will flush all caches inside the current cpu.

Signed-off-by: Chenhui Zhao 
Signed-off-by: Tang Yuantian 
Signed-off-by: Scott Wood

powerpc: Add POWER9 cputable entry

2016-02-22T09:47:48+00:00

Add a cputable entry for POWER9.  More code is required to actually
boot and run on a POWER9 but this gets the base piece in which we can
start building on.

Copies over from POWER8 except for:
- Adds a new CPU_FTR_ARCH_300 bit to start hanging new architecture
   features from (in subsequent patches).
- Advertises new user features bits PPC_FEATURE2_ARCH_3_00 &
  HAS_IEEE128 when on POWER9.
- Drops CPU_FTR_SUBCORE.
- Drops PMU code and machine check.

Signed-off-by: Michael Neuling 
Signed-off-by: Michael Ellerman