linux.git/arch/powerpc/kernel/align.c, branch v2.6.30

powerpc: Fix load/store float double alignment handler

2009-02-23T04:53:05+00:00

When we introduced VSX, we changed the way FPRs are stored in the
thread_struct.  Unfortunately we missed the load/store float double
alignment handler code when updating how we access FPRs in the
thread_struct.

Below fixes this and merges the little/big endian case.

Signed-off-by: Michael Neuling 
Signed-off-by: Benjamin Herrenschmidt

powerpc: Add alignment handler for new lfiwzx instruction

2009-02-23T04:53:04+00:00

lfiwzx is a new floating point load instruction in 2.06 that needs an
alignment handler for Linux.

Turns out to be the worlds easiest handler to add.

Signed-off-by: Michael Neuling 
Signed-off-by: Benjamin Herrenschmidt

powerpc/vsx: Fix VSX alignment handler for regs 32-63

2009-02-13T05:37:45+00:00

Fix the VSX alignment handler for VSX registers > 32.  32-63 are stored
in the VMX part of the thread_struct not the FPR part.

Signed-off-by: Michael Neuling 
CC: stable@kernel.org (2.6.27 & .28 please)
Signed-off-by: Benjamin Herrenschmidt

powerpc: Fix uninitialised variable in VSX alignment code

2008-09-03T10:53:14+00:00

This fixes an uninitialised variable in the VSX alignment code.  It can
cause warnings from GCC (noticed with gcc-4.1.1).  Gcc is actually
correct in this instance, and this bug could cause the alignment
interrupt handler to send a SIGSEGV to the process on a legitimate
access.

Signed-off-by: Michael Neuling 
Signed-off-by: Paul Mackerras

powerpc: Add VSX load/store alignment exception handler

2008-07-15T02:29:25+00:00

VSX loads and stores will take an alignment exception when the address
is not on a 4 byte boundary.

This add support for these alignment exceptions and will emulate the
requested load or store.

Signed-off-by: Michael Neuling 
Signed-off-by: Benjamin Herrenschmidt

powerpc: remove unused variable in emulate_fp_pair

2008-07-09T06:30:47+00:00

regs is not used in emulate_fp_pair so remove it.

Signed-off-by: Michael Neuling 
Signed-off-by: Benjamin Herrenschmidt

powerpc: Add macros to access floating point registers in thread_struct.

2008-07-01T01:28:43+00:00

We are going to change where the floating point registers are stored
in the thread_struct, so in preparation add some macros to access the
floating point registers.  Update all code to use these new macros.

Signed-off-by: Michael Neuling 
Signed-off-by: Paul Mackerras

[POWERPC] Handle alignment faults on SPE load/store instructions

2007-09-14T13:51:48+00:00

This adds code to handle alignment traps generated by the following
SPE (signal processing engine) load/store instructions, by emulating
the instruction in the kernel (as is done for other instructions that
generate alignment traps):

evldd[x]         Vector Load Double Word into Double Word [Indexed]
evldw[x]         Vector Load Double into Two Words [Indexed]
evldh[x]         Vector Load Double into Four Half Words [Indexed]
evlhhesplat[x]   Vector Load Half Word into Half Words Even and Splat [Indexed]
evlhhousplat[x]  Vector Load Half Word into Half Word Odd Unsigned and Splat [Indexed]
evlhhossplat[x]  Vector Load Half Word into Half Word Odd Signed and Splat [Indexed]
evlwhe[x]        Vector Load Word into Two Half Words Even [Indexed]
evlwhou[x]       Vector Load Word into Two Half Words Odd Unsigned (zero-extended) [Indexed]
evlwhos[x]       Vector Load Word into Two Half Words Odd Signed (with sign extension) [Indexed]
evlwwsplat[x]    Vector Load Word into Word and Splat [Indexed]
evlwhsplat[x]    Vector Load Word into Two Half Words and Splat [Indexed]
evstdd[x]        Vector Store Double of Double [Indexed]
evstdw[x]        Vector Store Double of Two Words [Indexed]
evstdh[x]        Vector Store Double of Four Half Words [Indexed]
evstwhe[x]       Vector Store Word of Two Half Words from Even [Indexed]
evstwho[x]       Vector Store Word of Two Half Words from Odd [Indexed]
evstwwe[x]       Vector Store Word of Word from Even [Indexed]
evstwwo[x]       Vector Store Word of Word from Odd [Indexed]

Signed-off-by: Kumar Gala

[POWERPC] Handle alignment faults on new FP load/store instructions

2007-08-17T01:01:55+00:00

This adds code to handle alignment traps generated by the following
new floating-point load/store instructions, by emulating the
instruction in the kernel (as is done for other instructions that
generate alignment traps):

lfiwax	load floating-point as integer word algebraic indexed
stfiwx	store floating-point as integer word indexed
lfdp	load floating-point double pair
lfdpx	load floating-point double pair indexed
stfdp	store floating-point double pair
stfdpx	store floating-point double pair indexed

All these except stfiwx are new in POWER6.

lfdp/lfdpx/stfdp/stfdpx load and store 16 bytes of memory into an
even/odd FP register pair.  In little-endian mode each 8-byte value is
byte-reversed separately (i.e. not as a 16-byte unit).  lfiwax/stfiwx
load or store the lower 4 bytes of a floating-point register from/to
memory; lfiwax sets the upper 4 bytes of the FP register to the sign
extension of the value loaded.

Signed-off-by: Paul Mackerras

[POWERPC] Alignment exception uses __get/put_user_inatomic

2007-04-12T18:09:38+00:00

Make the alignment exception handler use the new _inatomic variants
of __get/put_user. This fixes erroneous warnings in the very rare
cases where we manage to have copy_tofrom_user_inatomic() trigger
an alignment exception.

Signed-off-by: Benjamin Herrenschmidt 

 arch/powerpc/kernel/align.c |   56 ++++++++++++++++++++++++--------------------
 1 file changed, 31 insertions(+), 25 deletions(-)
Signed-off-by: Paul Mackerras