linux.git/arch/parisc/kernel/processor.c, branch v5.2-rc2 Linux kernel source tree parisc: Use __ro_after_init in processor.c 2019-05-10T19:00:45+00:00 Helge Deller deller@gmx.de 2019-05-10T18:55:08+00:00 d98883690b7bc5faab98795dff694549e4c60556 Signed-off-by: Helge Deller <deller@gmx.de> 
Signed-off-by: Helge Deller <deller@gmx.de>
parisc: Show n/a if product number not available 2019-05-03T21:47:39+00:00 Helge Deller deller@gmx.de 2019-04-09T20:22:29+00:00 0e4db23e12b704c5aeb547b69a62e5869dc1bcb8 Signed-off-by: Helge Deller <deller@gmx.de> 
Signed-off-by: Helge Deller <deller@gmx.de>
parisc: Show machine product number during boot 2019-02-21T19:37:13+00:00 Helge Deller deller@gmx.de 2019-02-08T17:28:13+00:00 8207d4ee44d3f525bf9aa57807ac9db5d0d90c1a Ask PDC firmware during boot for the original and current product number as well as the serial number and show it (if available). Signed-off-by: Helge Deller <deller@gmx.de> 
Ask PDC firmware during boot for the original and current product
number as well as the serial number and show it (if available).

Signed-off-by: Helge Deller <deller@gmx.de>
parisc: Add hardware description to stack traces 2018-08-21T12:46:26+00:00 Helge Deller deller@gmx.de 2018-08-21T06:15:42+00:00 dbf2a4b1ffab2867505be3b24221d5efa2200c91 Signed-off-by: Helge Deller <deller@gmx.de> 
Signed-off-by: Helge Deller <deller@gmx.de>
parisc: Add CPU topology support 2017-11-17T14:27:22+00:00 Helge Deller deller@gmx.de 2017-09-21T19:55:01+00:00 bf7b4c1b3c92f246a535a7c792177041d0442011 Add topology support, including multi-core scheduler support on PA8800/PA8900 CPUs and enhanced output in /proc/cpuinfo, e.g. lscpu now reports on a single-socket, dual-core machine: Architecture: parisc64 CPU(s): 2 On-line CPU(s) list: 0,1 Thread(s) per core: 1 Core(s) per socket: 2 Socket(s): 1 CPU family: PA-RISC 2.0 Model name: PA8800 (Mako) Signed-off-by: Helge Deller <deller@gmx.de> 
Add topology support, including multi-core scheduler support on
PA8800/PA8900 CPUs and enhanced output in /proc/cpuinfo, e.g.
lscpu now reports on a single-socket, dual-core machine:

Architecture:          parisc64
CPU(s):                2
On-line CPU(s) list:   0,1
Thread(s) per core:    1
Core(s) per socket:    2
Socket(s):             1
CPU family:            PA-RISC 2.0
Model name:            PA8800 (Mako)

Signed-off-by: Helge Deller <deller@gmx.de>
parisc: Move init_per_cpu() into init section 2017-09-22T17:47:08+00:00 Helge Deller deller@gmx.de 2017-09-21T19:22:27+00:00 a7e6601f70a53957b1d01c321319f0237bba5202 Signed-off-by: Helge Deller <deller@gmx.de> 
Signed-off-by: Helge Deller <deller@gmx.de>
parisc/core: Fix section mismatches 2017-08-22T14:34:37+00:00 Helge Deller deller@gmx.de 2017-08-21T20:09:30+00:00 6c706b93b078ca0a802f6987b81899f4650a7810 Signed-off-by: Helge Deller <deller@gmx.de> 
Signed-off-by: Helge Deller <deller@gmx.de>
parisc/random: Add machine specific randomness 2017-08-22T14:34:34+00:00 Helge Deller deller@gmx.de 2017-08-10T17:20:47+00:00 1ed4714fba25a3730369567b081549ee1da49124 Add some machine-specific information like values of cr16 cycle counter, machine-specific software ID and machine model to the random generator. Signed-off-by: Helge Deller <deller@gmx.de> 
Add some machine-specific information like values of cr16 cycle counter,
machine-specific software ID and machine model to the random generator.

Signed-off-by: Helge Deller <deller@gmx.de>
parisc: Enhance detection of synchronous cr16 clocksources 2017-05-10T15:46:14+00:00 Helge Deller deller@gmx.de 2017-01-08T10:01:11+00:00 c8c3735997a3aa184fa81742bb6c4062a26af2f3 The cr16 clocks of the physical PARISC CPUs are usually nonsynchronous. Nevertheless, it seems that each CPU socket (which holds two cores) of PA8800 and PA8900 CPUs (e.g. in a C8000 workstation) is fed by the same clock source, which makes the cr16 clocks of each CPU socket syncronous. Let's try to detect such situations and mark the cr16 clocksource stable on single-socket and single-core machines. Signed-off-by: Helge Deller <deller@gmx.de> 
The cr16 clocks of the physical PARISC CPUs are usually nonsynchronous.
Nevertheless, it seems that each CPU socket (which holds two cores) of
PA8800 and PA8900 CPUs (e.g. in a C8000 workstation) is fed by the same
clock source, which makes the cr16 clocks of each CPU socket syncronous.
Let's try to detect such situations and mark the cr16 clocksource stable
on single-socket and single-core machines.

Signed-off-by: Helge Deller <deller@gmx.de>
parisc: Optimize timer interrupt function 2016-12-20T20:39:40+00:00 Helge Deller deller@gmx.de 2016-12-20T19:51:10+00:00 160494d381373cfa21208484aea4e5db2d3cb0a8 Restructure the timer interrupt function to better cope with missed timer irqs. Optimize the calculation when the next interrupt should happen and skip irqs if they would happen too shortly after exit of the irq function. The update_process_times() call is done anyway at every timer irq, so we can safely drop the prof_counter and prof_multiplier variables from the per_cpu structure. Signed-off-by: Helge Deller <deller@gmx.de> 
Restructure the timer interrupt function to better cope with missed timer irqs.
Optimize the calculation when the next interrupt should happen and skip irqs if
they would happen too shortly after exit of the irq function.

The update_process_times() call is done anyway at every timer irq, so we can
safely drop the prof_counter and prof_multiplier variables from the per_cpu
structure.

Signed-off-by: Helge Deller <deller@gmx.de>