<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/arch/openrisc/include/asm, branch v4.19</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>Merge tag 'for-linus' of git://github.com/openrisc/linux</title>
<updated>2018-08-23T21:09:37+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2018-08-23T21:09:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=2ab054fd1f88d7d22e6df7c34c41a2f9782c3f08'/>
<id>2ab054fd1f88d7d22e6df7c34c41a2f9782c3f08</id>
<content type='text'>
Pull OpenRISC update from Stafford Horne:
 "Just one change for 4.19: refactoring from Christoph Hellwig to use
  generic DMA facilities"

* tag 'for-linus' of git://github.com/openrisc/linux:
  openrisc: use generic dma_noncoherent_ops
  openrisc: fix cache maintainance the the sync_single_for_device DMA operation
  openrisc: remove the no-op unmap_page and unmap_sg DMA operations
  openrisc: remove the sync_single_for_cpu DMA operation
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull OpenRISC update from Stafford Horne:
 "Just one change for 4.19: refactoring from Christoph Hellwig to use
  generic DMA facilities"

* tag 'for-linus' of git://github.com/openrisc/linux:
  openrisc: use generic dma_noncoherent_ops
  openrisc: fix cache maintainance the the sync_single_for_device DMA operation
  openrisc: remove the no-op unmap_page and unmap_sg DMA operations
  openrisc: remove the sync_single_for_cpu DMA operation
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'locking-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip</title>
<updated>2018-08-13T19:23:39+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2018-08-13T19:23:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=de5d1b39ea0b38a9f4dfb08966042b7b91e2df30'/>
<id>de5d1b39ea0b38a9f4dfb08966042b7b91e2df30</id>
<content type='text'>
Pull locking/atomics update from Thomas Gleixner:
 "The locking, atomics and memory model brains delivered:

   - A larger update to the atomics code which reworks the ordering
     barriers, consolidates the atomic primitives, provides the new
     atomic64_fetch_add_unless() primitive and cleans up the include
     hell.

   - Simplify cmpxchg() instrumentation and add instrumentation for
     xchg() and cmpxchg_double().

   - Updates to the memory model and documentation"

* 'locking-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (48 commits)
  locking/atomics: Rework ordering barriers
  locking/atomics: Instrument cmpxchg_double*()
  locking/atomics: Instrument xchg()
  locking/atomics: Simplify cmpxchg() instrumentation
  locking/atomics/x86: Reduce arch_cmpxchg64*() instrumentation
  tools/memory-model: Rename litmus tests to comply to norm7
  tools/memory-model/Documentation: Fix typo, smb-&gt;smp
  sched/Documentation: Update wake_up() &amp; co. memory-barrier guarantees
  locking/spinlock, sched/core: Clarify requirements for smp_mb__after_spinlock()
  sched/core: Use smp_mb() in wake_woken_function()
  tools/memory-model: Add informal LKMM documentation to MAINTAINERS
  locking/atomics/Documentation: Describe atomic_set() as a write operation
  tools/memory-model: Make scripts executable
  tools/memory-model: Remove ACCESS_ONCE() from model
  tools/memory-model: Remove ACCESS_ONCE() from recipes
  locking/memory-barriers.txt/kokr: Update Korean translation to fix broken DMA vs. MMIO ordering example
  MAINTAINERS: Add Daniel Lustig as an LKMM reviewer
  tools/memory-model: Fix ISA2+pooncelock+pooncelock+pombonce name
  tools/memory-model: Add litmus test for full multicopy atomicity
  locking/refcount: Always allow checked forms
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull locking/atomics update from Thomas Gleixner:
 "The locking, atomics and memory model brains delivered:

   - A larger update to the atomics code which reworks the ordering
     barriers, consolidates the atomic primitives, provides the new
     atomic64_fetch_add_unless() primitive and cleans up the include
     hell.

   - Simplify cmpxchg() instrumentation and add instrumentation for
     xchg() and cmpxchg_double().

   - Updates to the memory model and documentation"

* 'locking-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (48 commits)
  locking/atomics: Rework ordering barriers
  locking/atomics: Instrument cmpxchg_double*()
  locking/atomics: Instrument xchg()
  locking/atomics: Simplify cmpxchg() instrumentation
  locking/atomics/x86: Reduce arch_cmpxchg64*() instrumentation
  tools/memory-model: Rename litmus tests to comply to norm7
  tools/memory-model/Documentation: Fix typo, smb-&gt;smp
  sched/Documentation: Update wake_up() &amp; co. memory-barrier guarantees
  locking/spinlock, sched/core: Clarify requirements for smp_mb__after_spinlock()
  sched/core: Use smp_mb() in wake_woken_function()
  tools/memory-model: Add informal LKMM documentation to MAINTAINERS
  locking/atomics/Documentation: Describe atomic_set() as a write operation
  tools/memory-model: Make scripts executable
  tools/memory-model: Remove ACCESS_ONCE() from model
  tools/memory-model: Remove ACCESS_ONCE() from recipes
  locking/memory-barriers.txt/kokr: Update Korean translation to fix broken DMA vs. MMIO ordering example
  MAINTAINERS: Add Daniel Lustig as an LKMM reviewer
  tools/memory-model: Fix ISA2+pooncelock+pooncelock+pombonce name
  tools/memory-model: Add litmus test for full multicopy atomicity
  locking/refcount: Always allow checked forms
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'irqchip-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core</title>
<updated>2018-08-06T10:45:42+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2018-08-06T10:45:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=9e90c7985229430428dc9ba0ec7fe422901b456d'/>
<id>9e90c7985229430428dc9ba0ec7fe422901b456d</id>
<content type='text'>
Pull irqchip updates from Marc Zyngier:

- GICv3 ITS LPI allocation revamp
- GICv3 support for hypervisor-enforced LPI range
- GICv3 ITS conversion to raw spinlock
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull irqchip updates from Marc Zyngier:

- GICv3 ITS LPI allocation revamp
- GICv3 support for hypervisor-enforced LPI range
- GICv3 ITS conversion to raw spinlock
</pre>
</div>
</content>
</entry>
<entry>
<title>openrisc: Use the new GENERIC_IRQ_MULTI_HANDLER</title>
<updated>2018-08-03T10:14:09+00:00</updated>
<author>
<name>Palmer Dabbelt</name>
<email>palmer@sifive.com</email>
</author>
<published>2018-06-22T17:01:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=c5ca4560de0f04a3c872bdd17ae3378762c66bd2'/>
<id>c5ca4560de0f04a3c872bdd17ae3378762c66bd2</id>
<content type='text'>
It appears that openrisc copied arm64's GENERIC_IRQ_MULTI_HANDLER code
(which came from arm).  Cnvert it to use the generic version.

Signed-off-by: Palmer Dabbelt &lt;palmer@sifive.com&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Acked-by: Stafford Horne &lt;shorne@gmail.com&gt;
Cc: linux@armlinux.org.uk
Cc: catalin.marinas@arm.com
Cc: Will Deacon &lt;will.deacon@arm.com&gt;
Cc: jonas@southpole.se
Cc: stefan.kristiansson@saunalahti.fi
Cc: jason@lakedaemon.net
Cc: marc.zyngier@arm.com
Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: nicolas.pitre@linaro.org
Cc: vladimir.murzin@arm.com
Cc: keescook@chromium.org
Cc: jinb.park7@gmail.com
Cc: yamada.masahiro@socionext.com
Cc: alexandre.belloni@bootlin.com
Cc: pombredanne@nexb.com
Cc: Greg KH &lt;gregkh@linuxfoundation.org&gt;
Cc: kstewart@linuxfoundation.org
Cc: jhogan@kernel.org
Cc: mark.rutland@arm.com
Cc: ard.biesheuvel@linaro.org
Cc: james.morse@arm.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: openrisc@lists.librecores.org
Link: https://lkml.kernel.org/r/20180622170126.6308-5-palmer@sifive.com

</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
It appears that openrisc copied arm64's GENERIC_IRQ_MULTI_HANDLER code
(which came from arm).  Cnvert it to use the generic version.

Signed-off-by: Palmer Dabbelt &lt;palmer@sifive.com&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Acked-by: Stafford Horne &lt;shorne@gmail.com&gt;
Cc: linux@armlinux.org.uk
Cc: catalin.marinas@arm.com
Cc: Will Deacon &lt;will.deacon@arm.com&gt;
Cc: jonas@southpole.se
Cc: stefan.kristiansson@saunalahti.fi
Cc: jason@lakedaemon.net
Cc: marc.zyngier@arm.com
Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: nicolas.pitre@linaro.org
Cc: vladimir.murzin@arm.com
Cc: keescook@chromium.org
Cc: jinb.park7@gmail.com
Cc: yamada.masahiro@socionext.com
Cc: alexandre.belloni@bootlin.com
Cc: pombredanne@nexb.com
Cc: Greg KH &lt;gregkh@linuxfoundation.org&gt;
Cc: kstewart@linuxfoundation.org
Cc: jhogan@kernel.org
Cc: mark.rutland@arm.com
Cc: ard.biesheuvel@linaro.org
Cc: james.morse@arm.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: openrisc@lists.librecores.org
Link: https://lkml.kernel.org/r/20180622170126.6308-5-palmer@sifive.com

</pre>
</div>
</content>
</entry>
<entry>
<title>openrisc: use generic dma_noncoherent_ops</title>
<updated>2018-07-21T04:49:48+00:00</updated>
<author>
<name>Christoph Hellwig</name>
<email>hch@lst.de</email>
</author>
<published>2018-07-19T13:02:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=5600779ea5f3d29fadc62208e21feb0bb9b813aa'/>
<id>5600779ea5f3d29fadc62208e21feb0bb9b813aa</id>
<content type='text'>
Switch to the generic noncoherent direct mapping implementation.

Signed-off-by: Christoph Hellwig &lt;hch@lst.de&gt;
Signed-off-by: Stafford Horne &lt;shorne@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Switch to the generic noncoherent direct mapping implementation.

Signed-off-by: Christoph Hellwig &lt;hch@lst.de&gt;
Signed-off-by: Stafford Horne &lt;shorne@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'v4.18-rc5' into locking/core, to pick up fixes</title>
<updated>2018-07-17T07:27:43+00:00</updated>
<author>
<name>Ingo Molnar</name>
<email>mingo@kernel.org</email>
</author>
<published>2018-07-17T07:27:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=52b544bd386688177c41d53e748111c29d0ccc98'/>
<id>52b544bd386688177c41d53e748111c29d0ccc98</id>
<content type='text'>
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>openrisc: Call destructor during __pte_free_tlb</title>
<updated>2018-06-25T12:49:10+00:00</updated>
<author>
<name>Stafford Horne</name>
<email>shorne@gmail.com</email>
</author>
<published>2018-06-17T21:52:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=560b423dd9af4272a1f3685c2d6b073fdc4af7c7'/>
<id>560b423dd9af4272a1f3685c2d6b073fdc4af7c7</id>
<content type='text'>
This fixes an issue uncovered when a recent change to add the "page
table" flag was merged.  During bootup we see many errors like the
following:

    BUG: Bad page state in process mkdir  pfn:00bae
    page:c1ff15c0 count:0 mapcount:-1024 mapping:00000000 index:0x0
    flags: 0x0()
    raw: 00000000 00000000 00000000 fffffbff 00000000 00000100 00000200 00000000
    page dumped because: nonzero mapcount
    Modules linked in:
    CPU: 0 PID: 46 Comm: mkdir Tainted: G    B             4.17.0-simple-smp-07461-g1d40a5ea01d5-dirty #993
    Call trace:
    [&lt;(ptrval)&gt;] show_stack+0x44/0x54
    [&lt;(ptrval)&gt;] dump_stack+0xb0/0xe8
    [&lt;(ptrval)&gt;] bad_page+0x138/0x174
    [&lt;(ptrval)&gt;] ? cpumask_next+0x24/0x34
    [&lt;(ptrval)&gt;] free_pages_check_bad+0x6c/0xd0
    [&lt;(ptrval)&gt;] free_pcppages_bulk+0x174/0x42c
    [&lt;(ptrval)&gt;] free_unref_page_commit.isra.17+0xb8/0xc8
    [&lt;(ptrval)&gt;] free_unref_page_list+0x10c/0x190
    [&lt;(ptrval)&gt;] ? set_reset_devices+0x0/0x2c
    [&lt;(ptrval)&gt;] release_pages+0x3a0/0x414
    [&lt;(ptrval)&gt;] tlb_flush_mmu_free+0x5c/0x90
    [&lt;(ptrval)&gt;] tlb_flush_mmu+0x90/0xa4
    [&lt;(ptrval)&gt;] arch_tlb_finish_mmu+0x50/0x94
    [&lt;(ptrval)&gt;] tlb_finish_mmu+0x30/0x64
    [&lt;(ptrval)&gt;] exit_mmap+0x110/0x1e0
    [&lt;(ptrval)&gt;] mmput+0x50/0xf0
    [&lt;(ptrval)&gt;] do_exit+0x274/0xa94
    [&lt;(ptrval)&gt;] do_group_exit+0x50/0x110
    [&lt;(ptrval)&gt;] __wake_up_parent+0x0/0x38
    [&lt;(ptrval)&gt;] _syscall_return+0x0/0x4

During the __pte_free_tlb path openrisc fails to call the page
destructor which would clear the new bits that were introduced.
To fix this we are calling the destructor.

It seem openrisc was the only architecture missing this,  all other
architectures either call the destructor like we are doing here or use
pte_free.

Note: failing to call the destructor was also messing up the zone stats
(and will be cause other problems if you were using SPLIT_PTE_PTLOCKS,
which we are not yet).

Fixes: 1d40a5ea01d53 ("mm: mark pages in use for page tables")
Acked-by: Matthew Wilcox &lt;willy@infradead.org&gt;
Signed-off-by: Stafford Horne &lt;shorne@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This fixes an issue uncovered when a recent change to add the "page
table" flag was merged.  During bootup we see many errors like the
following:

    BUG: Bad page state in process mkdir  pfn:00bae
    page:c1ff15c0 count:0 mapcount:-1024 mapping:00000000 index:0x0
    flags: 0x0()
    raw: 00000000 00000000 00000000 fffffbff 00000000 00000100 00000200 00000000
    page dumped because: nonzero mapcount
    Modules linked in:
    CPU: 0 PID: 46 Comm: mkdir Tainted: G    B             4.17.0-simple-smp-07461-g1d40a5ea01d5-dirty #993
    Call trace:
    [&lt;(ptrval)&gt;] show_stack+0x44/0x54
    [&lt;(ptrval)&gt;] dump_stack+0xb0/0xe8
    [&lt;(ptrval)&gt;] bad_page+0x138/0x174
    [&lt;(ptrval)&gt;] ? cpumask_next+0x24/0x34
    [&lt;(ptrval)&gt;] free_pages_check_bad+0x6c/0xd0
    [&lt;(ptrval)&gt;] free_pcppages_bulk+0x174/0x42c
    [&lt;(ptrval)&gt;] free_unref_page_commit.isra.17+0xb8/0xc8
    [&lt;(ptrval)&gt;] free_unref_page_list+0x10c/0x190
    [&lt;(ptrval)&gt;] ? set_reset_devices+0x0/0x2c
    [&lt;(ptrval)&gt;] release_pages+0x3a0/0x414
    [&lt;(ptrval)&gt;] tlb_flush_mmu_free+0x5c/0x90
    [&lt;(ptrval)&gt;] tlb_flush_mmu+0x90/0xa4
    [&lt;(ptrval)&gt;] arch_tlb_finish_mmu+0x50/0x94
    [&lt;(ptrval)&gt;] tlb_finish_mmu+0x30/0x64
    [&lt;(ptrval)&gt;] exit_mmap+0x110/0x1e0
    [&lt;(ptrval)&gt;] mmput+0x50/0xf0
    [&lt;(ptrval)&gt;] do_exit+0x274/0xa94
    [&lt;(ptrval)&gt;] do_group_exit+0x50/0x110
    [&lt;(ptrval)&gt;] __wake_up_parent+0x0/0x38
    [&lt;(ptrval)&gt;] _syscall_return+0x0/0x4

During the __pte_free_tlb path openrisc fails to call the page
destructor which would clear the new bits that were introduced.
To fix this we are calling the destructor.

It seem openrisc was the only architecture missing this,  all other
architectures either call the destructor like we are doing here or use
pte_free.

Note: failing to call the destructor was also messing up the zone stats
(and will be cause other problems if you were using SPLIT_PTE_PTLOCKS,
which we are not yet).

Fixes: 1d40a5ea01d53 ("mm: mark pages in use for page tables")
Acked-by: Matthew Wilcox &lt;willy@infradead.org&gt;
Signed-off-by: Stafford Horne &lt;shorne@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>atomics/treewide: Rename __atomic_add_unless() =&gt; atomic_fetch_add_unless()</title>
<updated>2018-06-21T12:22:32+00:00</updated>
<author>
<name>Mark Rutland</name>
<email>mark.rutland@arm.com</email>
</author>
<published>2018-06-21T12:13:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=bfc18e389c7a09fbbbed6bf4032396685b14246e'/>
<id>bfc18e389c7a09fbbbed6bf4032396685b14246e</id>
<content type='text'>
While __atomic_add_unless() was originally intended as a building-block
for atomic_add_unless(), it's now used in a number of places around the
kernel. It's the only common atomic operation named __atomic*(), rather
than atomic_*(), and for consistency it would be better named
atomic_fetch_add_unless().

This lack of consistency is slightly confusing, and gets in the way of
scripting atomics. Given that, let's clean things up and promote it to
an official part of the atomics API, in the form of
atomic_fetch_add_unless().

This patch converts definitions and invocations over to the new name,
including the instrumented version, using the following script:

  ----
  git grep -w __atomic_add_unless | while read line; do
  sed -i '{s/\&lt;__atomic_add_unless\&gt;/atomic_fetch_add_unless/}' "${line%%:*}";
  done
  git grep -w __arch_atomic_add_unless | while read line; do
  sed -i '{s/\&lt;__arch_atomic_add_unless\&gt;/arch_atomic_fetch_add_unless/}' "${line%%:*}";
  done
  ----

Note that we do not have atomic{64,_long}_fetch_add_unless(), which will
be introduced by later patches.

There should be no functional change as a result of this patch.

Signed-off-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Reviewed-by: Will Deacon &lt;will.deacon@arm.com&gt;
Acked-by: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt;
Acked-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Acked-by: Palmer Dabbelt &lt;palmer@sifive.com&gt;
Cc: Boqun Feng &lt;boqun.feng@gmail.com&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Link: https://lore.kernel.org/lkml/20180621121321.4761-2-mark.rutland@arm.com
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
While __atomic_add_unless() was originally intended as a building-block
for atomic_add_unless(), it's now used in a number of places around the
kernel. It's the only common atomic operation named __atomic*(), rather
than atomic_*(), and for consistency it would be better named
atomic_fetch_add_unless().

This lack of consistency is slightly confusing, and gets in the way of
scripting atomics. Given that, let's clean things up and promote it to
an official part of the atomics API, in the form of
atomic_fetch_add_unless().

This patch converts definitions and invocations over to the new name,
including the instrumented version, using the following script:

  ----
  git grep -w __atomic_add_unless | while read line; do
  sed -i '{s/\&lt;__atomic_add_unless\&gt;/atomic_fetch_add_unless/}' "${line%%:*}";
  done
  git grep -w __arch_atomic_add_unless | while read line; do
  sed -i '{s/\&lt;__arch_atomic_add_unless\&gt;/arch_atomic_fetch_add_unless/}' "${line%%:*}";
  done
  ----

Note that we do not have atomic{64,_long}_fetch_add_unless(), which will
be introduced by later patches.

There should be no functional change as a result of this patch.

Signed-off-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Reviewed-by: Will Deacon &lt;will.deacon@arm.com&gt;
Acked-by: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt;
Acked-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Acked-by: Palmer Dabbelt &lt;palmer@sifive.com&gt;
Cc: Boqun Feng &lt;boqun.feng@gmail.com&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Link: https://lore.kernel.org/lkml/20180621121321.4761-2-mark.rutland@arm.com
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>locking/atomics/openrisc: Don't pull in all of &lt;linux/bitops.h&gt; in &lt;asm/cmpxchg.h&gt;</title>
<updated>2018-06-21T10:52:11+00:00</updated>
<author>
<name>Will Deacon</name>
<email>will.deacon@arm.com</email>
</author>
<published>2018-06-19T12:53:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=b22d73c2bd76a6d05256dcd3262d00b5f5af09f4'/>
<id>b22d73c2bd76a6d05256dcd3262d00b5f5af09f4</id>
<content type='text'>
The openrisc implementation of &lt;asm/cmpxchg.h&gt; pulls in &lt;linux/bitops.h&gt;,
so that it can refer to BITS_PER_BYTE. It also transitively relies on
this pulling in &lt;linux/compiler.h&gt; for READ_ONCE().

Replace the #include with &lt;linux/bits.h&gt; and &lt;linux/compiler.h&gt;.

Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
Acked-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: linux-arm-kernel@lists.infradead.org
Cc: yamada.masahiro@socionext.com
Link: https://lore.kernel.org/lkml/1529412794-17720-5-git-send-email-will.deacon@arm.com
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The openrisc implementation of &lt;asm/cmpxchg.h&gt; pulls in &lt;linux/bitops.h&gt;,
so that it can refer to BITS_PER_BYTE. It also transitively relies on
this pulling in &lt;linux/compiler.h&gt; for READ_ONCE().

Replace the #include with &lt;linux/bits.h&gt; and &lt;linux/compiler.h&gt;.

Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
Acked-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: linux-arm-kernel@lists.infradead.org
Cc: yamada.masahiro@socionext.com
Link: https://lore.kernel.org/lkml/1529412794-17720-5-git-send-email-will.deacon@arm.com
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>time: Add an asm-generic/compat.h file</title>
<updated>2018-04-19T11:28:51+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2018-03-26T14:59:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=2b5a9a37e97467fea67070a94529d6d07e549270'/>
<id>2b5a9a37e97467fea67070a94529d6d07e549270</id>
<content type='text'>
We have a couple of files that try to include asm/compat.h on
architectures where this is available. Those should generally use the
higher-level linux/compat.h file, but that in turn fails to include
asm/compat.h when CONFIG_COMPAT is disabled, unless we can provide
that header on all architectures.

This adds the asm/compat.h for all remaining architectures to
simplify the dependencies.

Architectures that are getting removed in linux-4.17 are not changed
here, to avoid needless conflicts with the removal patches. Those
architectures are broken by this patch, but we have already shown
that they have no users.

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
We have a couple of files that try to include asm/compat.h on
architectures where this is available. Those should generally use the
higher-level linux/compat.h file, but that in turn fails to include
asm/compat.h when CONFIG_COMPAT is disabled, unless we can provide
that header on all architectures.

This adds the asm/compat.h for all remaining architectures to
simplify the dependencies.

Architectures that are getting removed in linux-4.17 are not changed
here, to avoid needless conflicts with the removal patches. Those
architectures are broken by this patch, but we have already shown
that they have no users.

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</pre>
</div>
</content>
</entry>
</feed>
