<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/arch/nds32, branch v4.17</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>nds32: Fix compiler warning, Wstringop-overflow, in vdso.c</title>
<updated>2018-05-23T05:26:22+00:00</updated>
<author>
<name>Vincent Chen</name>
<email>vincentc@andestech.com</email>
</author>
<published>2018-05-21T06:36:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=a30e7d1e37e8acc37c25420d93af218166cca3ae'/>
<id>a30e7d1e37e8acc37c25420d93af218166cca3ae</id>
<content type='text'>
Getting a compiler warning, Wstringop-overflow, in
arch/nds32/kernel/vdso.c when kernel is built by gcc-8. Declaring
vdso_start and vdso_end as a pointer to fix this compiler warning.

Signed-off-by: Vincent Chen &lt;vincentc@andestech.com&gt;
Reviewed-by: Greentime Hu &lt;greentime@andestech.com&gt;
Signed-off-by: Greentime Hu &lt;greentime@andestech.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Getting a compiler warning, Wstringop-overflow, in
arch/nds32/kernel/vdso.c when kernel is built by gcc-8. Declaring
vdso_start and vdso_end as a pointer to fix this compiler warning.

Signed-off-by: Vincent Chen &lt;vincentc@andestech.com&gt;
Reviewed-by: Greentime Hu &lt;greentime@andestech.com&gt;
Signed-off-by: Greentime Hu &lt;greentime@andestech.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>nds32: Disable local irq before calling cpu_dcache_wb_page in copy_user_highpage</title>
<updated>2018-05-23T05:26:22+00:00</updated>
<author>
<name>Vincent Chen</name>
<email>vincentc@andestech.com</email>
</author>
<published>2018-05-14T10:56:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=aaaaba57509526ce924f997d8690ee9e0c93945a'/>
<id>aaaaba57509526ce924f997d8690ee9e0c93945a</id>
<content type='text'>
In order to ensure that all data in source page has been written back
to memory before copy_page, the local irq shall be disabled before
calling cpu_dcache_wb_page(). In addition, removing unneeded page
invalidation for 'to' page.

Signed-off-by: Vincent Chen &lt;vincentc@andestech.com&gt;
Reviewed-by: Greentime Hu &lt;greentime@andestech.com&gt;
Signed-off-by: Greentime Hu &lt;greentime@andestech.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
In order to ensure that all data in source page has been written back
to memory before copy_page, the local irq shall be disabled before
calling cpu_dcache_wb_page(). In addition, removing unneeded page
invalidation for 'to' page.

Signed-off-by: Vincent Chen &lt;vincentc@andestech.com&gt;
Reviewed-by: Greentime Hu &lt;greentime@andestech.com&gt;
Signed-off-by: Greentime Hu &lt;greentime@andestech.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>nds32: Flush the cache of the page at vmaddr instead of kaddr in flush_anon_page</title>
<updated>2018-05-23T05:26:22+00:00</updated>
<author>
<name>Vincent Chen</name>
<email>vincentc@andestech.com</email>
</author>
<published>2018-05-14T08:56:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=5b9f95699b2166e06b7d7820c8173fdbff0ddf35'/>
<id>5b9f95699b2166e06b7d7820c8173fdbff0ddf35</id>
<content type='text'>
According to Documentation/cachetlb.txt, the cache of the page at vmaddr
shall be flushed in flush_anon_page instead of the cache of the page at
page_address(page).

Signed-off-by: Vincent Chen &lt;vincentc@andestech.com&gt;
Reviewed-by: Greentime Hu &lt;greentime@andestech.com&gt;
Signed-off-by: Greentime Hu &lt;greentime@andestech.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
According to Documentation/cachetlb.txt, the cache of the page at vmaddr
shall be flushed in flush_anon_page instead of the cache of the page at
page_address(page).

Signed-off-by: Vincent Chen &lt;vincentc@andestech.com&gt;
Reviewed-by: Greentime Hu &lt;greentime@andestech.com&gt;
Signed-off-by: Greentime Hu &lt;greentime@andestech.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>nds32: Correct flush_dcache_page function</title>
<updated>2018-05-23T05:26:22+00:00</updated>
<author>
<name>Vincent Chen</name>
<email>vincentc@andestech.com</email>
</author>
<published>2018-04-24T07:08:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=efcc4ea872edaeded28245d9b2ca8b9d8181b7cf'/>
<id>efcc4ea872edaeded28245d9b2ca8b9d8181b7cf</id>
<content type='text'>
1. Disable local irq before d-cache write-back and invalidate.
   The cpu_dcache_wbinval_page function is composed of d-cache
write-back and invalidate. If the local irq is enabled when calling
cpu_dcache_wbinval_page, the content of d-cache is possibly updated
between write-back and invalidate. In this case, the updated data will
be dropped due to the following d-cache invalidation. Therefore, we
disable the local irq before calling cpu_dcache_wbinval_page.

2. Correct the data write-back for page aliasing case.
   Only the page whose (page-&gt;index &lt;&lt; PAGE_SHIFT) is located at the
same page color as page_address(page) needs to execute data write-back
in flush_dcache_page function.

Signed-off-by: Vincent Chen &lt;vincentc@andestech.com&gt;
Reviewed-by: Greentime Hu &lt;greentime@andestech.com&gt;
Signed-off-by: Greentime Hu &lt;greentime@andestech.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
1. Disable local irq before d-cache write-back and invalidate.
   The cpu_dcache_wbinval_page function is composed of d-cache
write-back and invalidate. If the local irq is enabled when calling
cpu_dcache_wbinval_page, the content of d-cache is possibly updated
between write-back and invalidate. In this case, the updated data will
be dropped due to the following d-cache invalidation. Therefore, we
disable the local irq before calling cpu_dcache_wbinval_page.

2. Correct the data write-back for page aliasing case.
   Only the page whose (page-&gt;index &lt;&lt; PAGE_SHIFT) is located at the
same page color as page_address(page) needs to execute data write-back
in flush_dcache_page function.

Signed-off-by: Vincent Chen &lt;vincentc@andestech.com&gt;
Reviewed-by: Greentime Hu &lt;greentime@andestech.com&gt;
Signed-off-by: Greentime Hu &lt;greentime@andestech.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>nds32: Fix the unaligned access handler</title>
<updated>2018-05-23T05:26:22+00:00</updated>
<author>
<name>Nickhu</name>
<email>nickhu@andestech.com</email>
</author>
<published>2018-05-03T02:15:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=1613de8a785d21b3aac73d2a2e640b66d514393b'/>
<id>1613de8a785d21b3aac73d2a2e640b66d514393b</id>
<content type='text'>
If the kernel config 'CONFIG_ALIGNMENT_TRAP' and the file
'/proc/sys/nds32/unaligned_access/enable' are set, the kernel
unaligned access handler does not handle correctly when the
value of immediate field is negative. This commit fixes the
unaligned access handler in kernel.

Signed-off-by: Nickhu &lt;nickhu@andestech.com&gt;
Reviewed-by: Greentime Hu &lt;greentime@andestech.com&gt;
Signed-off-by: Greentime Hu &lt;greentime@andestech.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
If the kernel config 'CONFIG_ALIGNMENT_TRAP' and the file
'/proc/sys/nds32/unaligned_access/enable' are set, the kernel
unaligned access handler does not handle correctly when the
value of immediate field is negative. This commit fixes the
unaligned access handler in kernel.

Signed-off-by: Nickhu &lt;nickhu@andestech.com&gt;
Reviewed-by: Greentime Hu &lt;greentime@andestech.com&gt;
Signed-off-by: Greentime Hu &lt;greentime@andestech.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>nds32: Renaming the file for unaligned access</title>
<updated>2018-05-23T05:26:22+00:00</updated>
<author>
<name>Nickhu</name>
<email>nickhu@andestech.com</email>
</author>
<published>2018-05-04T08:40:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=b3a75846a5cfbea137e2810b2bf9407141e70feb'/>
<id>b3a75846a5cfbea137e2810b2bf9407141e70feb</id>
<content type='text'>
Change the name of the file '/proc/sys/nds32/unaligned_acess'
to '/proc/sys/nds32/unaligned_access'

Signed-off-by: Nickhu &lt;nickhu@andestech.com&gt;
Reviewed-by: Greentime Hu &lt;greentime@andestech.com&gt;
Signed-off-by: Greentime Hu &lt;greentime@andestech.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Change the name of the file '/proc/sys/nds32/unaligned_acess'
to '/proc/sys/nds32/unaligned_access'

Signed-off-by: Nickhu &lt;nickhu@andestech.com&gt;
Reviewed-by: Greentime Hu &lt;greentime@andestech.com&gt;
Signed-off-by: Greentime Hu &lt;greentime@andestech.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>nds32: To fix a cache inconsistency issue by setting correct cacheability of NTC</title>
<updated>2018-05-23T05:26:22+00:00</updated>
<author>
<name>Greentime Hu</name>
<email>greentime@andestech.com</email>
</author>
<published>2018-04-30T07:02:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=abb90a24eade1f612324de0e6920041ef64795cb'/>
<id>abb90a24eade1f612324de0e6920041ef64795cb</id>
<content type='text'>
The nds32 architecture will use physical memory when interrupt or
exception comes and it will use the setting of NTC0-4. The original
implementation didn't consider the DRAM start address may start from 1GB,
2GB or 3GB to cause this issue. It will write the data to DRAM if it is
running in physical address however kernel will read the data with
virtaul address through data cache. In this case, the data of DRAM is
latest.

This fix will set the correct cacheability to let kernel write/read the
latest data in cache instead of DRAM.

Signed-off-by: Greentime Hu &lt;greentime@andestech.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The nds32 architecture will use physical memory when interrupt or
exception comes and it will use the setting of NTC0-4. The original
implementation didn't consider the DRAM start address may start from 1GB,
2GB or 3GB to cause this issue. It will write the data to DRAM if it is
running in physical address however kernel will read the data with
virtaul address through data cache. In this case, the data of DRAM is
latest.

This fix will set the correct cacheability to let kernel write/read the
latest data in cache instead of DRAM.

Signed-off-by: Greentime Hu &lt;greentime@andestech.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>nds32: To refine readability of INT_MASK_INITAIAL_VAL</title>
<updated>2018-05-23T05:26:21+00:00</updated>
<author>
<name>Greentime Hu</name>
<email>greentime@andestech.com</email>
</author>
<published>2018-04-30T03:32:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=8769c223491a7fbb345021e7004cbdffe024eaf8'/>
<id>8769c223491a7fbb345021e7004cbdffe024eaf8</id>
<content type='text'>
Refine readability of INT_MASK_INITAIAL_VAL with meaningful macro instead
of magic number.

Signed-off-by: Greentime Hu &lt;greentime@andestech.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Refine readability of INT_MASK_INITAIAL_VAL with meaningful macro instead
of magic number.

Signed-off-by: Greentime Hu &lt;greentime@andestech.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>nds32: Fix the virtual address may map too much range by tlbop issue.</title>
<updated>2018-05-23T05:26:21+00:00</updated>
<author>
<name>Greentime Hu</name>
<email>greentime@andestech.com</email>
</author>
<published>2018-04-30T03:21:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=3ff2228dcea4e5c9b517375bd3aa9e3a1a3f29a0'/>
<id>3ff2228dcea4e5c9b517375bd3aa9e3a1a3f29a0</id>
<content type='text'>
We use tlbop to map virtual address in the first beginning, however it
may map too much if DRAM size is not that big. We have to invalidate the
mapping when the page table is created.

Signed-off-by: Greentime Hu &lt;greentime@andestech.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
We use tlbop to map virtual address in the first beginning, however it
may map too much if DRAM size is not that big. We have to invalidate the
mapping when the page table is created.

Signed-off-by: Greentime Hu &lt;greentime@andestech.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>nds32: Fix the allmodconfig build. To make sure CONFIG_CPU_LITTLE_ENDIAN is default y</title>
<updated>2018-05-23T05:26:21+00:00</updated>
<author>
<name>Greentime Hu</name>
<email>greentime@andestech.com</email>
</author>
<published>2018-04-19T08:26:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=b3b112bb06eb26ce44af63d599aaf5fe54de0699'/>
<id>b3b112bb06eb26ce44af63d599aaf5fe54de0699</id>
<content type='text'>
This way we can build kernel with CONFIG_CPU_LITTLE_ENDIAN=y. Build allmodconfig
and allnoconfig are available too. It also fixes the endian mismatch issue
because AFLAGS and LDFLAGS is not passed correctly.

Signed-off-by: Vincent Ren-Wei Chen &lt;vincentc@andestech.com&gt;
Signed-off-by: Greentime Hu &lt;greentime@andestech.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This way we can build kernel with CONFIG_CPU_LITTLE_ENDIAN=y. Build allmodconfig
and allnoconfig are available too. It also fixes the endian mismatch issue
because AFLAGS and LDFLAGS is not passed correctly.

Signed-off-by: Vincent Ren-Wei Chen &lt;vincentc@andestech.com&gt;
Signed-off-by: Greentime Hu &lt;greentime@andestech.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
