linux.git/arch/mips/math-emu, branch v3.12

MIPS: Remove unreachable break statements from cp1emu.c

2013-08-26T13:33:40+00:00

There were many cases of:

   return something;
   break;

All those break statements are unreachable and thus redundant.

Signed-off-by: David Daney 
Reviewed-by: Aaro Koskinen 
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5727/
Signed-off-by: Ralf Baechle

MIPS: Handle OCTEON BBIT instructions in FPU emulator.

2013-08-20T17:17:40+00:00

The branch emulation needs to handle the OCTEON BBIT instructions,
otherwise we get SIGILL instead of emulation.

Signed-off-by: David Daney 
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5726/
Signed-off-by: Ralf Baechle

MIPS: Don't try to decode microMIPS branch instructions where they cannot exist.

2013-07-01T13:10:57+00:00

In mm_isBranchInstr() we can short circuit the entire function if
!cpu_has_mmips.

Signed-off-by: David Daney 
Acked-by: Steven J. Hill 
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5326/
Signed-off-by: Ralf Baechle

MIPS: microMIPS: Floating point support.

2013-05-09T15:55:18+00:00

Add logic needed to do floating point emulation in microMIPS mode.

Signed-off-by: Leonid Yegoshin 
Signed-off-by: Steven J. Hill

MIPS: Whitespace cleanup.

2013-02-01T09:00:22+00:00

Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.

Signed-off-by: Ralf Baechle

MIPS: Nuke empty lines at end of files.

2013-02-01T09:00:22+00:00

Signed-off-by: Ralf Baechle

MIPS: Fix for warning from FPU emulation code

2012-12-13T17:15:27+00:00

The default implementation of 'cpu_has_fpu' macro calls
smp_processor_id() which causes this warning to be printed when
preemption is enabled:

[    4.664000] Algorithmics/MIPS FPU Emulator v1.5
[    4.676000] BUG: using smp_processor_id() in preemptible [00000000] code: ini
[    4.700000] caller is fpu_emulator_cop1Handler+0x434/0x27b8

This problem got introduced in November 2009 by
af1d2af877ef6c36990671bc86a5b9c5bb50b1da (lmo) [MIPS: Fix emulation of
64-bit FPU on 64-bit CPUs.] rsp.  da0bac33413b2888d3623dad3ad19ce76b688f07
(kernel.org) [MIPS: Fix emulation of 64-bit FPU on FPU-less 64-bit CPUs.]
in 2.6.32.

Fixed by rewriting cop1_64bit() to return a constant whenever possible
but most importantly avoid the use pf cpu_has_fpu entirely.

Signed-off-by: Ralf Baechle 
Reported-by: Jayachandran C 
Initial-patch-by: Jayachandran C 
Patchwork: https://patchwork.linux-mips.org/patch/4225/

Disintegrate asm/system.h for MIPS

2012-03-28T17:30:02+00:00

Disintegrate asm/system.h for MIPS.

Signed-off-by: David Howells 
Acked-by: Ralf Baechle 
cc: linux-mips@linux-mips.org

MIPS Kprobes: Refactor branch emulation

2011-12-07T22:04:03+00:00

This patch refactors MIPS branch emulation code so as to allow skipping
delay slot instruction in case of branch likely instructions when branch is
not taken. This is useful for keeping the code common for use cases like
kprobes where one would like to handle the branch instructions keeping the
delay slot instuction also in picture for branch likely instructions. Also
allow emulation when instruction to be decoded is not at pt_regs->cp0_epc
as in case of kprobes where pt_regs->cp0_epc points to the breakpoint
instruction.

The patch also exports the function for modules.

Signed-off-by: Maneesh Soni 
Signed-off-by: Victor Kamensky 
Cc: David Daney 
Cc: ananth@in.ibm.com
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2913/
Signed-off-by: Ralf Baechle

perf: Remove the nmi parameter from the swevent and overflow interface

2011-07-01T09:06:35+00:00

The nmi parameter indicated if we could do wakeups from the current
context, if not, we would set some state and self-IPI and let the
resulting interrupt do the wakeup.

For the various event classes:

  - hardware: nmi=0; PMI is in fact an NMI or we run irq_work_run from
    the PMI-tail (ARM etc.)
  - tracepoint: nmi=0; since tracepoint could be from NMI context.
  - software: nmi=[0,1]; some, like the schedule thing cannot
    perform wakeups, and hence need 0.

As one can see, there is very little nmi=1 usage, and the down-side of
not using it is that on some platforms some software events can have a
jiffy delay in wakeup (when arch_irq_work_raise isn't implemented).

The up-side however is that we can remove the nmi parameter and save a
bunch of conditionals in fast paths.

Signed-off-by: Peter Zijlstra 
Cc: Michael Cree 
Cc: Will Deacon 
Cc: Deng-Cheng Zhu 
Cc: Anton Blanchard 
Cc: Eric B Munson 
Cc: Heiko Carstens 
Cc: Paul Mundt 
Cc: David S. Miller 
Cc: Frederic Weisbecker 
Cc: Jason Wessel 
Cc: Don Zickus 
Link: http://lkml.kernel.org/n/tip-agjev8eu666tvknpb3iaj0fg@git.kernel.org
Signed-off-by: Ingo Molnar