<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/arch/mips/kernel/traps.c, branch v2.6.35</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>MIPS: Return after handling coprocessor 2 exception</title>
<updated>2010-07-05T16:17:33+00:00</updated>
<author>
<name>Jesper Nilsson</name>
<email>jesper@jni.nu</email>
</author>
<published>2010-06-17T13:25:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=55dc9d51a89ba10a1f7b3ed15f1262eb83e87e74'/>
<id>55dc9d51a89ba10a1f7b3ed15f1262eb83e87e74</id>
<content type='text'>
Breaking here dropped us to the default code which always sends a SIGILL
to the current process, no matter what the CU2 notifier says.

[Ralf: Currently this only hurts on Cavium and possibly some out of tree
platforms.]

Signed-off-by: Jesper Nilsson &lt;jesper@jni.nu&gt;
To: linux-mips@linux-mips.org
To: linux-kernel@vger.kernel.org
Patchwork: http://patchwork.linux-mips.org/patch/1391/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Breaking here dropped us to the default code which always sends a SIGILL
to the current process, no matter what the CU2 notifier says.

[Ralf: Currently this only hurts on Cavium and possibly some out of tree
platforms.]

Signed-off-by: Jesper Nilsson &lt;jesper@jni.nu&gt;
To: linux-mips@linux-mips.org
To: linux-kernel@vger.kernel.org
Patchwork: http://patchwork.linux-mips.org/patch/1391/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus</title>
<updated>2010-05-21T22:23:54+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2010-05-21T22:23:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=6969a434737dd82f7343e3fcd529bc320508d9fc'/>
<id>6969a434737dd82f7343e3fcd529bc320508d9fc</id>
<content type='text'>
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (25 commits)
  MIPS: Use GCC __builtin_prefetch() to implement prefetch().
  MIPS: Octeon: Serial port fixes for OCTEON simulator.
  MIPS: Octeon: Get rid of early serial.
  MIPS: AR7: prevent race between clock initialization and devices registration
  MIPS: AR7: use ar7_has_high_vlynq() to determine watchdog base address
  MIPS: BCM63xx: Avoid namespace clash on GPIO_DIR_{IN,OUT}
  MIPS: MTX-1: Update defconfig
  MIPS: BCM47xx: Update defconfig
  MIPS: RB532: Update defconfig
  MIPS: AR7: Update defconfig
  RTC: rtc-cmos: Fix binary mode support
  MIPS: Oprofile: Loongson: Cleanup the comments
  MIPS: Oprofile: Loongson: Cleanup of the macros
  MIPS: Oprofile: Loongson: Remove unused variable from loongson2_cpu_setup()
  MIPS: Oprofile: Loongson: Remove useless parentheses
  MIPS: Oprofile: Loongson: Unify macro for setting events
  MIPS: nofpu and nodsp only affect CPU0
  MIPS: Clean up tables for bootmem allocation
  MIPS: Coding style cleanups of access of FCSR rounding mode bits
  MIPS: Loongson 2F: Add gpio/gpioilb support
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (25 commits)
  MIPS: Use GCC __builtin_prefetch() to implement prefetch().
  MIPS: Octeon: Serial port fixes for OCTEON simulator.
  MIPS: Octeon: Get rid of early serial.
  MIPS: AR7: prevent race between clock initialization and devices registration
  MIPS: AR7: use ar7_has_high_vlynq() to determine watchdog base address
  MIPS: BCM63xx: Avoid namespace clash on GPIO_DIR_{IN,OUT}
  MIPS: MTX-1: Update defconfig
  MIPS: BCM47xx: Update defconfig
  MIPS: RB532: Update defconfig
  MIPS: AR7: Update defconfig
  RTC: rtc-cmos: Fix binary mode support
  MIPS: Oprofile: Loongson: Cleanup the comments
  MIPS: Oprofile: Loongson: Cleanup of the macros
  MIPS: Oprofile: Loongson: Remove unused variable from loongson2_cpu_setup()
  MIPS: Oprofile: Loongson: Remove useless parentheses
  MIPS: Oprofile: Loongson: Unify macro for setting events
  MIPS: nofpu and nodsp only affect CPU0
  MIPS: Clean up tables for bootmem allocation
  MIPS: Coding style cleanups of access of FCSR rounding mode bits
  MIPS: Loongson 2F: Add gpio/gpioilb support
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Use set_cpus_allowed_ptr</title>
<updated>2010-05-21T20:31:14+00:00</updated>
<author>
<name>Julia Lawall</name>
<email>julia@diku.dk</email>
</author>
<published>2010-03-26T22:03:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=ed1bbdefc39477a1301fb466139ffb0c00f0d006'/>
<id>ed1bbdefc39477a1301fb466139ffb0c00f0d006</id>
<content type='text'>
From: Julia Lawall &lt;julia@diku.dk&gt;

Use set_cpus_allowed_ptr rather than set_cpus_allowed.

The semantic patch that makes this change is as follows:
(http://coccinelle.lip6.fr/)

// &lt;smpl&gt;
@@
expression E1,E2;
@@

- set_cpus_allowed(E1, cpumask_of_cpu(E2))
+ set_cpus_allowed_ptr(E1, cpumask_of(E2))

@@
expression E;
identifier I;
@@

- set_cpus_allowed(E, I)
+ set_cpus_allowed_ptr(E, &amp;I)
// &lt;/smpl&gt;

Signed-off-by: Julia Lawall &lt;julia@diku.dk&gt;
To: peterz@infradead.org
To: mingo@elte.hu
To: tglx@linutronix.de
To: oleg@redhat.com
To: linux-mips@linux-mips.org
To: linux-kernel@vger.kernel.org
To: kernel-janitors@vger.kernel.org
Patchwork: http://patchwork.linux-mips.org/patch/1087/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
From: Julia Lawall &lt;julia@diku.dk&gt;

Use set_cpus_allowed_ptr rather than set_cpus_allowed.

The semantic patch that makes this change is as follows:
(http://coccinelle.lip6.fr/)

// &lt;smpl&gt;
@@
expression E1,E2;
@@

- set_cpus_allowed(E1, cpumask_of_cpu(E2))
+ set_cpus_allowed_ptr(E1, cpumask_of(E2))

@@
expression E;
identifier I;
@@

- set_cpus_allowed(E, I)
+ set_cpus_allowed_ptr(E, &amp;I)
// &lt;/smpl&gt;

Signed-off-by: Julia Lawall &lt;julia@diku.dk&gt;
To: peterz@infradead.org
To: mingo@elte.hu
To: tglx@linutronix.de
To: oleg@redhat.com
To: linux-mips@linux-mips.org
To: linux-kernel@vger.kernel.org
To: kernel-janitors@vger.kernel.org
Patchwork: http://patchwork.linux-mips.org/patch/1087/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mips,kgdb: kdb low level trap catch and stack trace</title>
<updated>2010-05-21T02:04:26+00:00</updated>
<author>
<name>Jason Wessel</name>
<email>jason.wessel@windriver.com</email>
</author>
<published>2010-05-21T02:04:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=5dd11d5d47d248850c58292513f0e164ba98b01e'/>
<id>5dd11d5d47d248850c58292513f0e164ba98b01e</id>
<content type='text'>
The only way the debugger can handle a trap in inside rcu_lock,
notify_die, or atomic_notifier_call_chain without a recursive fault is
to have a low level "first opportunity handler" do_trap_or_bp() handler.

Generally this will be something the vast majority of folks will not
need, but for those who need it, it is added as a kernel .config
option called KGDB_LOW_LEVEL_TRAP.

Also added was a die notification for oops such that kdb can catch an
oops for analysis.

There appeared to be no obvious way to pass the struct pt_regs from
the original exception back to the stack back tracer, so a special
case was added to show_stack() for when kdb is active because you
generally desire to generally look at the back trace of the original
exception.

Signed-off-by: Jason Wessel &lt;jason.wessel@windriver.com&gt;
Acked-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The only way the debugger can handle a trap in inside rcu_lock,
notify_die, or atomic_notifier_call_chain without a recursive fault is
to have a low level "first opportunity handler" do_trap_or_bp() handler.

Generally this will be something the vast majority of folks will not
need, but for those who need it, it is added as a kernel .config
option called KGDB_LOW_LEVEL_TRAP.

Also added was a die notification for oops such that kdb can catch an
oops for analysis.

There appeared to be no obvious way to pass the struct pt_regs from
the original exception back to the stack back tracer, so a special
case was added to show_stack() for when kdb is active because you
generally desire to generally look at the back trace of the original
exception.

Signed-off-by: Jason Wessel &lt;jason.wessel@windriver.com&gt;
Acked-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Use CKSEG1ADDR for uncached handler</title>
<updated>2010-04-30T19:52:48+00:00</updated>
<author>
<name>Sebastian Andrzej Siewior</name>
<email>sebastian@breakpoint.cc</email>
</author>
<published>2010-04-27T20:53:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=4f81b01a30ffb338068d611e27da18c08db55464'/>
<id>4f81b01a30ffb338068d611e27da18c08db55464</id>
<content type='text'>
"MIPS: Calculate proper ebase value for 64-bit kernels"
9af43ea080dd5d6c7b34f38261780e5dd43537bc (lmo) rsp.
f6be75d03c8870be91e6e2a195648ece04b6bb16 (kernel.org) broke some 64-bit
MIPS systems.

Before this we were using XKPHYS/cached as ebase and computed the uncached
xphsys/unchached address for that area. After that commit ebase became a
32-bit compat address and convert does not work anymore.  We now should use
CKSEG1 for this. CKSEG1ADDR does just that in 32-bit and 64-bit.

Signed-off-by: Sebastian Andrzej Siewior &lt;sebastian@breakpoint.cc&gt;
To: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Patchwork: http://patchwork.linux-mips.org/patch/1149/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
"MIPS: Calculate proper ebase value for 64-bit kernels"
9af43ea080dd5d6c7b34f38261780e5dd43537bc (lmo) rsp.
f6be75d03c8870be91e6e2a195648ece04b6bb16 (kernel.org) broke some 64-bit
MIPS systems.

Before this we were using XKPHYS/cached as ebase and computed the uncached
xphsys/unchached address for that area. After that commit ebase became a
32-bit compat address and convert does not work anymore.  We now should use
CKSEG1 for this. CKSEG1ADDR does just that in 32-bit and 64-bit.

Signed-off-by: Sebastian Andrzej Siewior &lt;sebastian@breakpoint.cc&gt;
To: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Patchwork: http://patchwork.linux-mips.org/patch/1149/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: die() does not call die notifier chain</title>
<updated>2010-04-30T19:52:45+00:00</updated>
<author>
<name>Yury Polyanskiy</name>
<email>ypolyans@princeton.edu</email>
</author>
<published>2010-04-26T04:53:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=ce384d83d00ee457c3931d3fdb9fa2c38e345a3c'/>
<id>ce384d83d00ee457c3931d3fdb9fa2c38e345a3c</id>
<content type='text'>
The MIPS implementation of die() forgets to call notify_die() and thus notifiers
registered via register_die_notifier() are not called.  This results in kgdb not
being activated on exceptions.

The only subtlety is that notify_die declares its regs argument w/o const, so
the const had to be removed from mips die() as well.

[Ralf: Fixed build error for SGI IP22 and IP28 platforms.]

Signed-off-by: Yury Polyanskiy &lt;ypolyans@princeton.edu&gt;
Cc: linux-mips@linux-mips.org
Patchworks: http://patchwork.linux-mips.org/patch/1142/
Acked-by: Jason Wessel &lt;jason.wessel@windriver.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;

---
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The MIPS implementation of die() forgets to call notify_die() and thus notifiers
registered via register_die_notifier() are not called.  This results in kgdb not
being activated on exceptions.

The only subtlety is that notify_die declares its regs argument w/o const, so
the const had to be removed from mips die() as well.

[Ralf: Fixed build error for SGI IP22 and IP28 platforms.]

Signed-off-by: Yury Polyanskiy &lt;ypolyans@princeton.edu&gt;
Cc: linux-mips@linux-mips.org
Patchworks: http://patchwork.linux-mips.org/patch/1142/
Acked-by: Jason Wessel &lt;jason.wessel@windriver.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;

---
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Calculate proper ebase value for 64-bit kernels</title>
<updated>2010-04-12T16:26:22+00:00</updated>
<author>
<name>David Daney</name>
<email>ddaney@caviumnetworks.com</email>
</author>
<published>2010-04-06T20:29:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=f6be75d03c8870be91e6e2a195648ece04b6bb16'/>
<id>f6be75d03c8870be91e6e2a195648ece04b6bb16</id>
<content type='text'>
The ebase is relative to CKSEG0 not CAC_BASE.  On a 32-bit kernel they
are the same thing, for a 64-bit kernel they are not.

It happens to kind of work on a 64-bit kernel as they both reference
the same physical memory.  However since the CPU uses the CKSEG0 base,
determining if a J instruction will reach always gives the wrong result
unless we use the same number the CPU uses.

Signed-off-by: David Daney &lt;ddaney@caviumnetworks.com&gt;
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1093/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The ebase is relative to CKSEG0 not CAC_BASE.  On a 32-bit kernel they
are the same thing, for a 64-bit kernel they are not.

It happens to kind of work on a 64-bit kernel as they both reference
the same physical memory.  However since the CPU uses the CKSEG0 base,
determining if a J instruction will reach always gives the wrong result
unless we use the same number the CPU uses.

Signed-off-by: David Daney &lt;ddaney@caviumnetworks.com&gt;
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1093/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Deal with larger physical offsets</title>
<updated>2010-02-27T11:53:19+00:00</updated>
<author>
<name>Florian Fainelli</name>
<email>florian@openwrt.org</email>
</author>
<published>2010-01-28T14:22:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=92bbe1b988d3d6fa6348e3e376ff6d27e0712147'/>
<id>92bbe1b988d3d6fa6348e3e376ff6d27e0712147</id>
<content type='text'>
AR7 has a larger physical offset than other MIPS based systems and therefore
needs to setup its handlers beyond the usual KSEG0 range. When running the
kernel in mapped mode this modification is also required. Remove function
comment which is now incorrect.

Signed-off-by: David Daney &lt;ddaney@caviumnetworks.com&gt;
Signed-off-by: Eugene Konev &lt;ejka@imfi.kspu.ru&gt;
Signed-off-by: Florian Fainelli &lt;florian@openwrt.org&gt;
To: linux-mips@linux-mips.org
To: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/889/
Patchwork: http://patchwork.linux-mips.org/patch/932/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
AR7 has a larger physical offset than other MIPS based systems and therefore
needs to setup its handlers beyond the usual KSEG0 range. When running the
kernel in mapped mode this modification is also required. Remove function
comment which is now incorrect.

Signed-off-by: David Daney &lt;ddaney@caviumnetworks.com&gt;
Signed-off-by: Eugene Konev &lt;ejka@imfi.kspu.ru&gt;
Signed-off-by: Florian Fainelli &lt;florian@openwrt.org&gt;
To: linux-mips@linux-mips.org
To: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/889/
Patchwork: http://patchwork.linux-mips.org/patch/932/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Annotate set_except_vector with __init</title>
<updated>2010-02-27T11:53:19+00:00</updated>
<author>
<name>Florian Fainelli</name>
<email>florian@openwrt.org</email>
</author>
<published>2010-01-28T14:21:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=2d1b6e95515d63030b6e002125799f2aa52a9d27'/>
<id>2d1b6e95515d63030b6e002125799f2aa52a9d27</id>
<content type='text'>
All call sites of set_except_vector are already annotated with __init, so
annotate that one too.

Signed-off-by: Regards, Florian Fainelli &lt;florian@openwrt.org&gt;
To: linux-mips@linux-mips.org
To: David Daney &lt;ddaney@caviumnetworks.com&gt;
Patchwork: http://patchwork.linux-mips.org/patch/888/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
All call sites of set_except_vector are already annotated with __init, so
annotate that one too.

Signed-off-by: Regards, Florian Fainelli &lt;florian@openwrt.org&gt;
To: linux-mips@linux-mips.org
To: David Daney &lt;ddaney@caviumnetworks.com&gt;
Patchwork: http://patchwork.linux-mips.org/patch/888/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Fixup of the r4k timer</title>
<updated>2010-02-10T21:15:42+00:00</updated>
<author>
<name>Wu Zhangjin</name>
<email>wuzhangjin@gmail.com</email>
</author>
<published>2010-02-01T09:10:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=f4fc580bec5fb76560329c8c537b9b71d8d032b6'/>
<id>f4fc580bec5fb76560329c8c537b9b71d8d032b6</id>
<content type='text'>
As reported by Maxime Bizon, the commit "MIPS: PowerTV: Fix support for
timer interrupts with &gt; 64 external IRQs" have broken the r4k timer
since it didn't initialize the cp0_compare_irq_shift variable used in
c0_compare_int_pending() on the architectures whose cpu_has_mips_r2 is
false.

This patch fixes it via initializing the cp0_compare_irq_shift as the
cp0_compare_irq used in the old c0_compare_int_pending().

Reported-by: Maxime Bizon &lt;mbizon@freebox.fr&gt;
Signed-off-by: Wu Zhangjin &lt;wuzhangjin@gmail.com&gt;
Cc: David VomLehn &lt;dvomlehn@cisco.com&gt;
Cc: mbizon@freebox.fr
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/922/
Tested-by: Shane McDonald &lt;mcdonald.shane@gmail.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
As reported by Maxime Bizon, the commit "MIPS: PowerTV: Fix support for
timer interrupts with &gt; 64 external IRQs" have broken the r4k timer
since it didn't initialize the cp0_compare_irq_shift variable used in
c0_compare_int_pending() on the architectures whose cpu_has_mips_r2 is
false.

This patch fixes it via initializing the cp0_compare_irq_shift as the
cp0_compare_irq used in the old c0_compare_int_pending().

Reported-by: Maxime Bizon &lt;mbizon@freebox.fr&gt;
Signed-off-by: Wu Zhangjin &lt;wuzhangjin@gmail.com&gt;
Cc: David VomLehn &lt;dvomlehn@cisco.com&gt;
Cc: mbizon@freebox.fr
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/922/
Tested-by: Shane McDonald &lt;mcdonald.shane@gmail.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
