<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/arch/mips/kernel/smp.c, branch v6.0</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>MIPS: smp: optimization for flush_tlb_mm when exiting</title>
<updated>2022-05-12T15:56:21+00:00</updated>
<author>
<name>Mao Bibo</name>
<email>maobibo@loongson.cn</email>
</author>
<published>2022-05-10T11:44:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=84595f450a8fc773a5543e2a0cca55067db38a8d'/>
<id>84595f450a8fc773a5543e2a0cca55067db38a8d</id>
<content type='text'>
When process exits or execute new binary, it will call function
exit_mmap with old mm, there is such function call trace:
  exit_mmap(struct mm_struct *mm)
      --&gt; tlb_finish_mmu(&amp;tlb, 0, -1)
         --&gt; arch_tlb_finish_mmu(tlb, start, end, force)
	    --&gt; tlb_flush_mmu(tlb);
               --&gt; tlb_flush(struct mmu_gather *tlb)
                  --&gt; flush_tlb_mm(tlb-&gt;mm)

It is not necessary to flush tlb since oldmm is not used anymore
by the process, there is similar operations on IA64/ARM64 etc,
this patch adds such optimization on MIPS.

Signed-off-by: Mao Bibo &lt;maobibo@loongson.cn&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When process exits or execute new binary, it will call function
exit_mmap with old mm, there is such function call trace:
  exit_mmap(struct mm_struct *mm)
      --&gt; tlb_finish_mmu(&amp;tlb, 0, -1)
         --&gt; arch_tlb_finish_mmu(tlb, start, end, force)
	    --&gt; tlb_flush_mmu(tlb);
               --&gt; tlb_flush(struct mmu_gather *tlb)
                  --&gt; flush_tlb_mm(tlb-&gt;mm)

It is not necessary to flush tlb since oldmm is not used anymore
by the process, there is similar operations on IA64/ARM64 etc,
this patch adds such optimization on MIPS.

Signed-off-by: Mao Bibo &lt;maobibo@loongson.cn&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: smp: fill in sibling and core maps earlier</title>
<updated>2022-02-16T19:48:10+00:00</updated>
<author>
<name>Alexander Lobakin</name>
<email>alobakin@pm.me</email>
</author>
<published>2022-02-12T22:21:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=f2703def339c793674010cc9f01bfe4980231808'/>
<id>f2703def339c793674010cc9f01bfe4980231808</id>
<content type='text'>
After enabling CONFIG_SCHED_CORE (landed during 5.14 cycle),
2-core 2-thread-per-core interAptiv (CPS-driven) started emitting
the following:

[    0.025698] CPU1 revision is: 0001a120 (MIPS interAptiv (multi))
[    0.048183] ------------[ cut here ]------------
[    0.048187] WARNING: CPU: 1 PID: 0 at kernel/sched/core.c:6025 sched_core_cpu_starting+0x198/0x240
[    0.048220] Modules linked in:
[    0.048233] CPU: 1 PID: 0 Comm: swapper/1 Not tainted 5.17.0-rc3+ #35 b7b319f24073fd9a3c2aa7ad15fb7993eec0b26f
[    0.048247] Stack : 817f0000 00000004 327804c8 810eb050 00000000 00000004 00000000 c314fdd1
[    0.048278]         830cbd64 819c0000 81800000 817f0000 83070bf4 00000001 830cbd08 00000000
[    0.048307]         00000000 00000000 815fcbc4 00000000 00000000 00000000 00000000 00000000
[    0.048334]         00000000 00000000 00000000 00000000 817f0000 00000000 00000000 817f6f34
[    0.048361]         817f0000 818a3c00 817f0000 00000004 00000000 00000000 4dc33260 0018c933
[    0.048389]         ...
[    0.048396] Call Trace:
[    0.048399] [&lt;8105a7bc&gt;] show_stack+0x3c/0x140
[    0.048424] [&lt;8131c2a0&gt;] dump_stack_lvl+0x60/0x80
[    0.048440] [&lt;8108b5c0&gt;] __warn+0xc0/0xf4
[    0.048454] [&lt;8108b658&gt;] warn_slowpath_fmt+0x64/0x10c
[    0.048467] [&lt;810bd418&gt;] sched_core_cpu_starting+0x198/0x240
[    0.048483] [&lt;810c6514&gt;] sched_cpu_starting+0x14/0x80
[    0.048497] [&lt;8108c0f8&gt;] cpuhp_invoke_callback_range+0x78/0x140
[    0.048510] [&lt;8108d914&gt;] notify_cpu_starting+0x94/0x140
[    0.048523] [&lt;8106593c&gt;] start_secondary+0xbc/0x280
[    0.048539]
[    0.048543] ---[ end trace 0000000000000000 ]---
[    0.048636] Synchronize counters for CPU 1: done.

...for each but CPU 0/boot.
Basic debug printks right before the mentioned line say:

[    0.048170] CPU: 1, smt_mask:

So smt_mask, which is sibling mask obviously, is empty when entering
the function.
This is critical, as sched_core_cpu_starting() calculates
core-scheduling parameters only once per CPU start, and it's crucial
to have all the parameters filled in at that moment (at least it
uses cpu_smt_mask() which in fact is `&amp;cpu_sibling_map[cpu]` on
MIPS).

A bit of debugging led me to that set_cpu_sibling_map() performing
the actual map calculation, was being invocated after
notify_cpu_start(), and exactly the latter function starts CPU HP
callback round (sched_core_cpu_starting() is basically a CPU HP
callback).
While the flow is same on ARM64 (maps after the notifier, although
before calling set_cpu_online()), x86 started calculating sibling
maps earlier than starting the CPU HP callbacks in Linux 4.14 (see
[0] for the reference). Neither me nor my brief tests couldn't find
any potential caveats in calculating the maps right after performing
delay calibration, but the WARN splat is now gone.
The very same debug prints now yield exactly what I expected from
them:

[    0.048433] CPU: 1, smt_mask: 0-1

[0] https://git.kernel.org/pub/scm/linux/kernel/git/mips/linux.git/commit/?id=76ce7cfe35ef

Signed-off-by: Alexander Lobakin &lt;alobakin@pm.me&gt;
Reviewed-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
After enabling CONFIG_SCHED_CORE (landed during 5.14 cycle),
2-core 2-thread-per-core interAptiv (CPS-driven) started emitting
the following:

[    0.025698] CPU1 revision is: 0001a120 (MIPS interAptiv (multi))
[    0.048183] ------------[ cut here ]------------
[    0.048187] WARNING: CPU: 1 PID: 0 at kernel/sched/core.c:6025 sched_core_cpu_starting+0x198/0x240
[    0.048220] Modules linked in:
[    0.048233] CPU: 1 PID: 0 Comm: swapper/1 Not tainted 5.17.0-rc3+ #35 b7b319f24073fd9a3c2aa7ad15fb7993eec0b26f
[    0.048247] Stack : 817f0000 00000004 327804c8 810eb050 00000000 00000004 00000000 c314fdd1
[    0.048278]         830cbd64 819c0000 81800000 817f0000 83070bf4 00000001 830cbd08 00000000
[    0.048307]         00000000 00000000 815fcbc4 00000000 00000000 00000000 00000000 00000000
[    0.048334]         00000000 00000000 00000000 00000000 817f0000 00000000 00000000 817f6f34
[    0.048361]         817f0000 818a3c00 817f0000 00000004 00000000 00000000 4dc33260 0018c933
[    0.048389]         ...
[    0.048396] Call Trace:
[    0.048399] [&lt;8105a7bc&gt;] show_stack+0x3c/0x140
[    0.048424] [&lt;8131c2a0&gt;] dump_stack_lvl+0x60/0x80
[    0.048440] [&lt;8108b5c0&gt;] __warn+0xc0/0xf4
[    0.048454] [&lt;8108b658&gt;] warn_slowpath_fmt+0x64/0x10c
[    0.048467] [&lt;810bd418&gt;] sched_core_cpu_starting+0x198/0x240
[    0.048483] [&lt;810c6514&gt;] sched_cpu_starting+0x14/0x80
[    0.048497] [&lt;8108c0f8&gt;] cpuhp_invoke_callback_range+0x78/0x140
[    0.048510] [&lt;8108d914&gt;] notify_cpu_starting+0x94/0x140
[    0.048523] [&lt;8106593c&gt;] start_secondary+0xbc/0x280
[    0.048539]
[    0.048543] ---[ end trace 0000000000000000 ]---
[    0.048636] Synchronize counters for CPU 1: done.

...for each but CPU 0/boot.
Basic debug printks right before the mentioned line say:

[    0.048170] CPU: 1, smt_mask:

So smt_mask, which is sibling mask obviously, is empty when entering
the function.
This is critical, as sched_core_cpu_starting() calculates
core-scheduling parameters only once per CPU start, and it's crucial
to have all the parameters filled in at that moment (at least it
uses cpu_smt_mask() which in fact is `&amp;cpu_sibling_map[cpu]` on
MIPS).

A bit of debugging led me to that set_cpu_sibling_map() performing
the actual map calculation, was being invocated after
notify_cpu_start(), and exactly the latter function starts CPU HP
callback round (sched_core_cpu_starting() is basically a CPU HP
callback).
While the flow is same on ARM64 (maps after the notifier, although
before calling set_cpu_online()), x86 started calculating sibling
maps earlier than starting the CPU HP callbacks in Linux 4.14 (see
[0] for the reference). Neither me nor my brief tests couldn't find
any potential caveats in calculating the maps right after performing
delay calibration, but the WARN splat is now gone.
The very same debug prints now yield exactly what I expected from
them:

[    0.048433] CPU: 1, smt_mask: 0-1

[0] https://git.kernel.org/pub/scm/linux/kernel/git/mips/linux.git/commit/?id=76ce7cfe35ef

Signed-off-by: Alexander Lobakin &lt;alobakin@pm.me&gt;
Reviewed-by: Philippe Mathieu-Daudé &lt;f4bug@amsat.org&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sched/core: Initialize the idle task with preemption disabled</title>
<updated>2021-05-12T11:01:45+00:00</updated>
<author>
<name>Valentin Schneider</name>
<email>valentin.schneider@arm.com</email>
</author>
<published>2021-05-12T09:46:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=f1a0a376ca0c4ef1fc3d24e3e502acbb5b795674'/>
<id>f1a0a376ca0c4ef1fc3d24e3e502acbb5b795674</id>
<content type='text'>
As pointed out by commit

  de9b8f5dcbd9 ("sched: Fix crash trying to dequeue/enqueue the idle thread")

init_idle() can and will be invoked more than once on the same idle
task. At boot time, it is invoked for the boot CPU thread by
sched_init(). Then smp_init() creates the threads for all the secondary
CPUs and invokes init_idle() on them.

As the hotplug machinery brings the secondaries to life, it will issue
calls to idle_thread_get(), which itself invokes init_idle() yet again.
In this case it's invoked twice more per secondary: at _cpu_up(), and at
bringup_cpu().

Given smp_init() already initializes the idle tasks for all *possible*
CPUs, no further initialization should be required. Now, removing
init_idle() from idle_thread_get() exposes some interesting expectations
with regards to the idle task's preempt_count: the secondary startup always
issues a preempt_disable(), requiring some reset of the preempt count to 0
between hot-unplug and hotplug, which is currently served by
idle_thread_get() -&gt; idle_init().

Given the idle task is supposed to have preemption disabled once and never
see it re-enabled, it seems that what we actually want is to initialize its
preempt_count to PREEMPT_DISABLED and leave it there. Do that, and remove
init_idle() from idle_thread_get().

Secondary startups were patched via coccinelle:

  @begone@
  @@

  -preempt_disable();
  ...
  cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);

Signed-off-by: Valentin Schneider &lt;valentin.schneider@arm.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Acked-by: Peter Zijlstra &lt;peterz@infradead.org&gt;
Link: https://lore.kernel.org/r/20210512094636.2958515-1-valentin.schneider@arm.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
As pointed out by commit

  de9b8f5dcbd9 ("sched: Fix crash trying to dequeue/enqueue the idle thread")

init_idle() can and will be invoked more than once on the same idle
task. At boot time, it is invoked for the boot CPU thread by
sched_init(). Then smp_init() creates the threads for all the secondary
CPUs and invokes init_idle() on them.

As the hotplug machinery brings the secondaries to life, it will issue
calls to idle_thread_get(), which itself invokes init_idle() yet again.
In this case it's invoked twice more per secondary: at _cpu_up(), and at
bringup_cpu().

Given smp_init() already initializes the idle tasks for all *possible*
CPUs, no further initialization should be required. Now, removing
init_idle() from idle_thread_get() exposes some interesting expectations
with regards to the idle task's preempt_count: the secondary startup always
issues a preempt_disable(), requiring some reset of the preempt count to 0
between hot-unplug and hotplug, which is currently served by
idle_thread_get() -&gt; idle_init().

Given the idle task is supposed to have preemption disabled once and never
see it re-enabled, it seems that what we actually want is to initialize its
preempt_count to PREEMPT_DISABLED and leave it there. Do that, and remove
init_idle() from idle_thread_get().

Secondary startups were patched via coccinelle:

  @begone@
  @@

  -preempt_disable();
  ...
  cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);

Signed-off-by: Valentin Schneider &lt;valentin.schneider@arm.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Acked-by: Peter Zijlstra &lt;peterz@infradead.org&gt;
Link: https://lore.kernel.org/r/20210512094636.2958515-1-valentin.schneider@arm.com
</pre>
</div>
</content>
</entry>
<entry>
<title>arch: mips: kernel: Fix two spelling in smp.c</title>
<updated>2021-02-03T10:33:48+00:00</updated>
<author>
<name>Bhaskar Chowdhury</name>
<email>unixbhaskar@gmail.com</email>
</author>
<published>2021-02-02T09:18:11+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=a056aacd2df2ec8134ed3baffd7fb6ba02874652'/>
<id>a056aacd2df2ec8134ed3baffd7fb6ba02874652</id>
<content type='text'>
s/logcal/logical/
s/intercpu/inter-CPU/

Signed-off-by: Bhaskar Chowdhury &lt;unixbhaskar@gmail.com&gt;
Acked-by: Randy Dunlap &lt;rdunlap@infradead.org&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
s/logcal/logical/
s/intercpu/inter-CPU/

Signed-off-by: Bhaskar Chowdhury &lt;unixbhaskar@gmail.com&gt;
Acked-by: Randy Dunlap &lt;rdunlap@infradead.org&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>smp: Cleanup smp_call_function*()</title>
<updated>2020-11-24T15:47:49+00:00</updated>
<author>
<name>Peter Zijlstra</name>
<email>peterz@infradead.org</email>
</author>
<published>2020-06-15T09:29:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=545b8c8df41f9ecbaf806332d4095bc4bc7c14e8'/>
<id>545b8c8df41f9ecbaf806332d4095bc4bc7c14e8</id>
<content type='text'>
Get rid of the __call_single_node union and cleanup the API a little
to avoid external code relying on the structure layout as much.

Signed-off-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Reviewed-by: Frederic Weisbecker &lt;frederic@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Get rid of the __call_single_node union and cleanup the API a little
to avoid external code relying on the structure layout as much.

Signed-off-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Reviewed-by: Frederic Weisbecker &lt;frederic@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'mips_5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux</title>
<updated>2020-03-31T15:51:45+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2020-03-31T15:51:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=d71e064449a704a026fa032ec852d532f08aefa1'/>
<id>d71e064449a704a026fa032ec852d532f08aefa1</id>
<content type='text'>
Pull MIPS updates from Thomas Bogendoerfer:

 - loongson64 irq rework

 - dmi support loongson

 - replace setup_irq() by request_irq()

 - jazz cleanups

 - minor cleanups and fixes

* tag 'mips_5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (44 commits)
  MIPS: ralink: mt7621: Fix soc_device introduction
  MIPS: Exclude more dsemul code when CONFIG_MIPS_FP_SUPPORT=n
  MIPS/tlbex: Fix LDDIR usage in setup_pw() for Loongson-3
  MIPS: do not compile generic functions for CONFIG_CAVIUM_OCTEON_SOC
  MAINTAINERS: Update Loongson64 entry
  MIPS: Loongson64: Load built-in dtbs
  MIPS: Loongson64: Add generic dts
  dt-bindings: mips: Add loongson boards
  MIPS: Loongson64: Drop legacy IRQ code
  dt-bindings: interrupt-controller: Add Loongson-3 HTPIC
  irqchip: Add driver for Loongson-3 HyperTransport PIC controller
  dt-bindings: interrupt-controller: Add Loongson LIOINTC
  irqchip: loongson-liointc: Workaround LPC IRQ Errata
  irqchip: Add driver for Loongson I/O Local Interrupt Controller
  docs: mips: remove no longer needed au1xxx_ide.rst documentation
  MIPS: Alchemy: remove no longer used au1xxx_ide.h header
  ide: remove no longer used au1xxx-ide driver
  MIPS: Add support for Desktop Management Interface (DMI)
  firmware: dmi: Add macro SMBIOS_ENTRY_POINT_SCAN_START
  MIPS: ralink: mt7621: introduce 'soc_device' initialization
  ...
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Pull MIPS updates from Thomas Bogendoerfer:

 - loongson64 irq rework

 - dmi support loongson

 - replace setup_irq() by request_irq()

 - jazz cleanups

 - minor cleanups and fixes

* tag 'mips_5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (44 commits)
  MIPS: ralink: mt7621: Fix soc_device introduction
  MIPS: Exclude more dsemul code when CONFIG_MIPS_FP_SUPPORT=n
  MIPS/tlbex: Fix LDDIR usage in setup_pw() for Loongson-3
  MIPS: do not compile generic functions for CONFIG_CAVIUM_OCTEON_SOC
  MAINTAINERS: Update Loongson64 entry
  MIPS: Loongson64: Load built-in dtbs
  MIPS: Loongson64: Add generic dts
  dt-bindings: mips: Add loongson boards
  MIPS: Loongson64: Drop legacy IRQ code
  dt-bindings: interrupt-controller: Add Loongson-3 HTPIC
  irqchip: Add driver for Loongson-3 HyperTransport PIC controller
  dt-bindings: interrupt-controller: Add Loongson LIOINTC
  irqchip: loongson-liointc: Workaround LPC IRQ Errata
  irqchip: Add driver for Loongson I/O Local Interrupt Controller
  docs: mips: remove no longer needed au1xxx_ide.rst documentation
  MIPS: Alchemy: remove no longer used au1xxx_ide.h header
  ide: remove no longer used au1xxx-ide driver
  MIPS: Add support for Desktop Management Interface (DMI)
  firmware: dmi: Add macro SMBIOS_ENTRY_POINT_SCAN_START
  MIPS: ralink: mt7621: introduce 'soc_device' initialization
  ...
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: smp: Remove tick_broadcast_count</title>
<updated>2020-03-06T12:42:28+00:00</updated>
<author>
<name>Peter Xu</name>
<email>peterx@redhat.com</email>
</author>
<published>2019-12-16T21:31:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=e188f0a50f637391f440b9bf0a1066db71a20889'/>
<id>e188f0a50f637391f440b9bf0a1066db71a20889</id>
<content type='text'>
Now smp_call_function_single_async() provides the protection that
we'll return with -EBUSY if the csd object is still pending, then we
don't need the tick_broadcast_count counter any more.

Signed-off-by: Peter Xu &lt;peterx@redhat.com&gt;
Signed-off-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Link: https://lkml.kernel.org/r/20191216213125.9536-3-peterx@redhat.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Now smp_call_function_single_async() provides the protection that
we'll return with -EBUSY if the csd object is still pending, then we
don't need the tick_broadcast_count counter any more.

Signed-off-by: Peter Xu &lt;peterx@redhat.com&gt;
Signed-off-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Link: https://lkml.kernel.org/r/20191216213125.9536-3-peterx@redhat.com
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Replace setup_irq() by request_irq()</title>
<updated>2020-03-05T15:47:35+00:00</updated>
<author>
<name>afzal mohammed</name>
<email>afzal.mohd.ma@gmail.com</email>
</author>
<published>2020-03-05T11:57:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=ac8fd122e070ce0e60c608d4f085f7af77290844'/>
<id>ac8fd122e070ce0e60c608d4f085f7af77290844</id>
<content type='text'>
request_irq() is preferred over setup_irq(). Invocations of setup_irq()
occur after memory allocators are ready.

Per tglx[1], setup_irq() existed in olden days when allocators were not
ready by the time early interrupts were initialized.

Hence replace setup_irq() by request_irq().

remove_irq() has been replaced by free_irq() as well.

There were build error's during previous version, couple of which was
reported by kbuild test robot &lt;lkp@intel.com&gt; of which one was reported
by Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt; as well. There were a
few more issues including build errors, those also have been fixed.

[1] https://lkml.kernel.org/r/alpine.DEB.2.20.1710191609480.1971@nanos

Signed-off-by: afzal mohammed &lt;afzal.mohd.ma@gmail.com&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
request_irq() is preferred over setup_irq(). Invocations of setup_irq()
occur after memory allocators are ready.

Per tglx[1], setup_irq() existed in olden days when allocators were not
ready by the time early interrupts were initialized.

Hence replace setup_irq() by request_irq().

remove_irq() has been replaced by free_irq() as well.

There were build error's during previous version, couple of which was
reported by kbuild test robot &lt;lkp@intel.com&gt; of which one was reported
by Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt; as well. There were a
few more issues including build errors, those also have been fixed.

[1] https://lkml.kernel.org/r/alpine.DEB.2.20.1710191609480.1971@nanos

Signed-off-by: afzal mohammed &lt;afzal.mohd.ma@gmail.com&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 156</title>
<updated>2019-05-30T18:26:35+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2019-05-27T06:55:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=1a59d1b8e05ea6ab45f7e18897de1ef0e6bc3da6'/>
<id>1a59d1b8e05ea6ab45f7e18897de1ef0e6bc3da6</id>
<content type='text'>
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version this program is distributed in the
  hope that it will be useful but without any warranty without even
  the implied warranty of merchantability or fitness for a particular
  purpose see the gnu general public license for more details you
  should have received a copy of the gnu general public license along
  with this program if not write to the free software foundation inc
  59 temple place suite 330 boston ma 02111 1307 usa

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 1334 file(s).

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Allison Randal &lt;allison@lohutok.net&gt;
Reviewed-by: Richard Fontana &lt;rfontana@redhat.com&gt;
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070033.113240726@linutronix.de
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version this program is distributed in the
  hope that it will be useful but without any warranty without even
  the implied warranty of merchantability or fitness for a particular
  purpose see the gnu general public license for more details you
  should have received a copy of the gnu general public license along
  with this program if not write to the free software foundation inc
  59 temple place suite 330 boston ma 02111 1307 usa

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 1334 file(s).

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Allison Randal &lt;allison@lohutok.net&gt;
Reviewed-by: Richard Fontana &lt;rfontana@redhat.com&gt;
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070033.113240726@linutronix.de
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: SGI-IP27: do boot CPU init later</title>
<updated>2019-02-19T20:46:03+00:00</updated>
<author>
<name>Thomas Bogendoerfer</name>
<email>tbogendoerfer@suse.de</email>
</author>
<published>2019-02-19T15:57:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=2c8656204742a5e2d373972b139d0cc26ae93ff0'/>
<id>2c8656204742a5e2d373972b139d0cc26ae93ff0</id>
<content type='text'>
To make use of per_cpu variables in interrupt code per_cpu_init() must
be done after setup_per_cpu_areas(). This is achieved by calling it
in smp_prepare_boot_cpu() via a new smp_ops method.

Signed-off-by: Thomas Bogendoerfer &lt;tbogendoerfer@suse.de&gt;
Signed-off-by: Paul Burton &lt;paul.burton@mips.com&gt;
Cc: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Cc: James Hogan &lt;jhogan@kernel.org&gt;
Cc: linux-mips@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
To make use of per_cpu variables in interrupt code per_cpu_init() must
be done after setup_per_cpu_areas(). This is achieved by calling it
in smp_prepare_boot_cpu() via a new smp_ops method.

Signed-off-by: Thomas Bogendoerfer &lt;tbogendoerfer@suse.de&gt;
Signed-off-by: Paul Burton &lt;paul.burton@mips.com&gt;
Cc: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Cc: James Hogan &lt;jhogan@kernel.org&gt;
Cc: linux-mips@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
</pre>
</div>
</content>
</entry>
</feed>
