<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/arch/mips/kernel/smp-cmp.c, branch v4.19</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>MIPS: smp-cmp: Fix vpe_id build error</title>
<updated>2017-11-01T23:23:00+00:00</updated>
<author>
<name>James Hogan</name>
<email>jhogan@kernel.org</email>
</author>
<published>2017-11-01T23:20:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=7e7bf0ec1a7cd4599941ae2c79c3039dc622853b'/>
<id>7e7bf0ec1a7cd4599941ae2c79c3039dc622853b</id>
<content type='text'>
The smp-cmp build has been (further) broken since commit 856fbcee6099
("MIPS: Store core &amp; VP IDs in GlobalNumber-style variable") in
v4.14-rc1 like so:

arch/mips/kernel/smp-cmp.c: In function ‘cmp_init_secondary’:
arch/mips/kernel/smp-cmp.c:53:4: error: ‘struct cpuinfo_mips’ has no member named ‘vpe_id’
   c-&gt;vpe_id = (read_c0_tcbind() &gt;&gt; TCBIND_CURVPE_SHIFT) &amp;
    ^

Fix by replacing vpe_id with cpu_set_vpe_id().

Fixes: 856fbcee6099 ("MIPS: Store core &amp; VP IDs in GlobalNumber-style variable")
Signed-off-by: James Hogan &lt;jhogan@kernel.org&gt;
Reviewed-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/17569/
Signed-off-by: James Hogan &lt;jhogan@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The smp-cmp build has been (further) broken since commit 856fbcee6099
("MIPS: Store core &amp; VP IDs in GlobalNumber-style variable") in
v4.14-rc1 like so:

arch/mips/kernel/smp-cmp.c: In function ‘cmp_init_secondary’:
arch/mips/kernel/smp-cmp.c:53:4: error: ‘struct cpuinfo_mips’ has no member named ‘vpe_id’
   c-&gt;vpe_id = (read_c0_tcbind() &gt;&gt; TCBIND_CURVPE_SHIFT) &amp;
    ^

Fix by replacing vpe_id with cpu_set_vpe_id().

Fixes: 856fbcee6099 ("MIPS: Store core &amp; VP IDs in GlobalNumber-style variable")
Signed-off-by: James Hogan &lt;jhogan@kernel.org&gt;
Reviewed-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/17569/
Signed-off-by: James Hogan &lt;jhogan@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: smp-cmp: Use right include for task_struct</title>
<updated>2017-11-01T22:16:37+00:00</updated>
<author>
<name>Jason A. Donenfeld</name>
<email>Jason@zx2c4.com</email>
</author>
<published>2017-10-23T17:20:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=f677b77050c144bd4c515b91ea48bd0efe82355e'/>
<id>f677b77050c144bd4c515b91ea48bd0efe82355e</id>
<content type='text'>
When task_struct was moved, this MIPS code was neglected. Evidently
nobody is using it anymore. This fixes this build error:

In file included from ./arch/mips/include/asm/thread_info.h:15:0,
                 from ./include/linux/thread_info.h:37,
                 from ./include/asm-generic/current.h:4,
                 from ./arch/mips/include/generated/asm/current.h:1,
                 from ./include/linux/sched.h:11,
                 from arch/mips/kernel/smp-cmp.c:22:
arch/mips/kernel/smp-cmp.c: In function ‘cmp_boot_secondary’:
./arch/mips/include/asm/processor.h:384:41: error: implicit declaration
of function ‘task_stack_page’ [-Werror=implicit-function-declaration]
 #define __KSTK_TOS(tsk) ((unsigned long)task_stack_page(tsk) + \
                                         ^
arch/mips/kernel/smp-cmp.c:84:21: note: in expansion of macro ‘__KSTK_TOS’
  unsigned long sp = __KSTK_TOS(idle);
                     ^~~~~~~~~~

Fixes: f3ac60671954 ("sched/headers: Move task-stack related APIs from &lt;linux/sched.h&gt; to &lt;linux/sched/task_stack.h&gt;")
Signed-off-by: Jason A. Donenfeld &lt;Jason@zx2c4.com&gt;
Cc: &lt;stable@vger.kernel.org&gt; # 4.11+
Patchwork: https://patchwork.linux-mips.org/patch/17522/
Signed-off-by: James Hogan &lt;jhogan@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When task_struct was moved, this MIPS code was neglected. Evidently
nobody is using it anymore. This fixes this build error:

In file included from ./arch/mips/include/asm/thread_info.h:15:0,
                 from ./include/linux/thread_info.h:37,
                 from ./include/asm-generic/current.h:4,
                 from ./arch/mips/include/generated/asm/current.h:1,
                 from ./include/linux/sched.h:11,
                 from arch/mips/kernel/smp-cmp.c:22:
arch/mips/kernel/smp-cmp.c: In function ‘cmp_boot_secondary’:
./arch/mips/include/asm/processor.h:384:41: error: implicit declaration
of function ‘task_stack_page’ [-Werror=implicit-function-declaration]
 #define __KSTK_TOS(tsk) ((unsigned long)task_stack_page(tsk) + \
                                         ^
arch/mips/kernel/smp-cmp.c:84:21: note: in expansion of macro ‘__KSTK_TOS’
  unsigned long sp = __KSTK_TOS(idle);
                     ^~~~~~~~~~

Fixes: f3ac60671954 ("sched/headers: Move task-stack related APIs from &lt;linux/sched.h&gt; to &lt;linux/sched/task_stack.h&gt;")
Signed-off-by: Jason A. Donenfeld &lt;Jason@zx2c4.com&gt;
Cc: &lt;stable@vger.kernel.org&gt; # 4.11+
Patchwork: https://patchwork.linux-mips.org/patch/17522/
Signed-off-by: James Hogan &lt;jhogan@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Remove unnecessary inclusions of linux/irqchip/mips-gic.h</title>
<updated>2017-09-04T11:53:14+00:00</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@imgtec.com</email>
</author>
<published>2017-08-13T04:36:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=3f1770c0e687c6009f4476bf529528568835f45c'/>
<id>3f1770c0e687c6009f4476bf529528568835f45c</id>
<content type='text'>
linux/irqchip/mips-gic.h is included in a few files that don't actually
use it at all. Remove these unnecessary inclusions in preparation for
removing the header.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: Jason Cooper &lt;jason@lakedaemon.net&gt;
Cc: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/17048/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
linux/irqchip/mips-gic.h is included in a few files that don't actually
use it at all. Remove these unnecessary inclusions in preparation for
removing the header.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: Jason Cooper &lt;jason@lakedaemon.net&gt;
Cc: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/17048/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: SMP: Allow boot_secondary SMP op to return errors</title>
<updated>2017-08-29T22:57:27+00:00</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@imgtec.com</email>
</author>
<published>2017-08-13T02:49:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=d595d423d06071bd7a4892c3c2f16bfe1d5b3a85'/>
<id>d595d423d06071bd7a4892c3c2f16bfe1d5b3a85</id>
<content type='text'>
Allow the boot_secondary SMP op to return an error to __cpu_up(), which
will in turn return it to its caller.

This will allow SMP implementations to return errors quickly in cases
they they know have failed, rather than relying upon __cpu_up()
eventually timing out waiting for the cpu_running completion.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/17014/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Allow the boot_secondary SMP op to return an error to __cpu_up(), which
will in turn return it to its caller.

This will allow SMP implementations to return errors quickly in cases
they they know have failed, rather than relying upon __cpu_up()
eventually timing out waiting for the cpu_running completion.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/17014/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: SMP: Constify smp ops</title>
<updated>2017-08-29T13:21:50+00:00</updated>
<author>
<name>Matt Redfearn</name>
<email>matt.redfearn@imgtec.com</email>
</author>
<published>2017-07-19T08:21:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=ff2c8252bfbf069dda1e53353a63b560f1369f59'/>
<id>ff2c8252bfbf069dda1e53353a63b560f1369f59</id>
<content type='text'>
smp_ops providers do not modify their ops structures, so they should be
made const for robustness. Since currently the MIPS kernel is not mapped
with memory protection, this does not in itself provide any security
benefit, but it still makes sense to make this change.

There are also slight code size efficincies from the structure being
made read-only, saving 128 bytes of kernel text on a
pistachio_defconfig.
Before:
   text	   data	    bss	    dec	    hex	filename
7187239	1772752	 470224	9430215	 8fe4c7	vmlinux
After:
   text	   data	    bss	    dec	    hex	filename
7187111	1772752	 470224	9430087	 8fe447	vmlinux

Signed-off-by: Matt Redfearn &lt;matt.redfearn@imgtec.com&gt;
Cc: Sebastian Andrzej Siewior &lt;bigeasy@linutronix.de&gt;
Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: Marcin Nowakowski &lt;marcin.nowakowski@imgtec.com&gt;
Cc: Bart Van Assche &lt;bart.vanassche@sandisk.com&gt;
Cc: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Cc: Huacai Chen &lt;chenhc@lemote.com&gt;
Cc: Paul Gortmaker &lt;paul.gortmaker@windriver.com&gt;
Cc: Kevin Cernekee &lt;cernekee@gmail.com&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Doug Ledford &lt;dledford@redhat.com&gt;
Cc: James Hogan &lt;james.hogan@imgtec.com&gt;
Cc: Joe Perches &lt;joe@perches.com&gt;
Cc: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Cc: Ingo Molnar &lt;mingo@kernel.org&gt;
Cc: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Cc: Steven J. Hill &lt;steven.hill@cavium.com&gt;
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/16784/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
smp_ops providers do not modify their ops structures, so they should be
made const for robustness. Since currently the MIPS kernel is not mapped
with memory protection, this does not in itself provide any security
benefit, but it still makes sense to make this change.

There are also slight code size efficincies from the structure being
made read-only, saving 128 bytes of kernel text on a
pistachio_defconfig.
Before:
   text	   data	    bss	    dec	    hex	filename
7187239	1772752	 470224	9430215	 8fe4c7	vmlinux
After:
   text	   data	    bss	    dec	    hex	filename
7187111	1772752	 470224	9430087	 8fe447	vmlinux

Signed-off-by: Matt Redfearn &lt;matt.redfearn@imgtec.com&gt;
Cc: Sebastian Andrzej Siewior &lt;bigeasy@linutronix.de&gt;
Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: Marcin Nowakowski &lt;marcin.nowakowski@imgtec.com&gt;
Cc: Bart Van Assche &lt;bart.vanassche@sandisk.com&gt;
Cc: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Cc: Huacai Chen &lt;chenhc@lemote.com&gt;
Cc: Paul Gortmaker &lt;paul.gortmaker@windriver.com&gt;
Cc: Kevin Cernekee &lt;cernekee@gmail.com&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Doug Ledford &lt;dledford@redhat.com&gt;
Cc: James Hogan &lt;james.hogan@imgtec.com&gt;
Cc: Joe Perches &lt;joe@perches.com&gt;
Cc: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Cc: Ingo Molnar &lt;mingo@kernel.org&gt;
Cc: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Cc: Steven J. Hill &lt;steven.hill@cavium.com&gt;
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/16784/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Make smp CMP, CPS and MT use the new generic IPI functions</title>
<updated>2016-02-25T09:56:58+00:00</updated>
<author>
<name>Qais Yousef</name>
<email>qais.yousef@imgtec.com</email>
</author>
<published>2015-12-08T13:20:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=bb11cff327e54179c13446c4022ed4ed7d4871c7'/>
<id>bb11cff327e54179c13446c4022ed4ed7d4871c7</id>
<content type='text'>
This commit does several things to avoid breaking bisectability.

	1- Remove IPI init code from irqchip/mips-gic
	2- Implement the new irqchip-&gt;send_ipi() in irqchip/mips-gic
	3- Select GENERIC_IRQ_IPI Kconfig symbol for MIPS_GIC
	4- Change MIPS SMP to use the generic IPI implementation

Only the SMP variants that use GIC were converted as it's the only irqchip that
will have the support for generic IPI for now.

Signed-off-by: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Acked-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Cc: &lt;jason@lakedaemon.net&gt;
Cc: &lt;marc.zyngier@arm.com&gt;
Cc: &lt;jiang.liu@linux.intel.com&gt;
Cc: &lt;linux-mips@linux-mips.org&gt;
Cc: &lt;lisa.parratt@imgtec.com&gt;
Cc: Qais Yousef &lt;qsyousef@gmail.com&gt;
Link: http://lkml.kernel.org/r/1449580830-23652-18-git-send-email-qais.yousef@imgtec.com
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This commit does several things to avoid breaking bisectability.

	1- Remove IPI init code from irqchip/mips-gic
	2- Implement the new irqchip-&gt;send_ipi() in irqchip/mips-gic
	3- Select GENERIC_IRQ_IPI Kconfig symbol for MIPS_GIC
	4- Change MIPS SMP to use the generic IPI implementation

Only the SMP variants that use GIC were converted as it's the only irqchip that
will have the support for generic IPI for now.

Signed-off-by: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Acked-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Cc: &lt;jason@lakedaemon.net&gt;
Cc: &lt;marc.zyngier@arm.com&gt;
Cc: &lt;jiang.liu@linux.intel.com&gt;
Cc: &lt;linux-mips@linux-mips.org&gt;
Cc: &lt;lisa.parratt@imgtec.com&gt;
Cc: Qais Yousef &lt;qsyousef@gmail.com&gt;
Link: http://lkml.kernel.org/r/1449580830-23652-18-git-send-email-qais.yousef@imgtec.com
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mips: fix up obsolete cpu function usage.</title>
<updated>2015-03-05T04:55:06+00:00</updated>
<author>
<name>Rusty Russell</name>
<email>rusty@rustcorp.com.au</email>
</author>
<published>2015-03-05T00:19:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=8dd928915a73bf95a727a46037964243eb1e042c'/>
<id>8dd928915a73bf95a727a46037964243eb1e042c</id>
<content type='text'>
Thanks to spatch, plus manual removal of "&amp;*".  Then a sweep for
for_each_cpu_mask =&gt; for_each_cpu.

Signed-off-by: Rusty Russell &lt;rusty@rustcorp.com.au&gt;
Cc: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Cc: Kevin Cernekee &lt;cernekee@gmail.com&gt;
Cc: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Cc: linux-mips@linux-mips.org
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Thanks to spatch, plus manual removal of "&amp;*".  Then a sweep for
for_each_cpu_mask =&gt; for_each_cpu.

Signed-off-by: Rusty Russell &lt;rusty@rustcorp.com.au&gt;
Cc: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Cc: Kevin Cernekee &lt;cernekee@gmail.com&gt;
Cc: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Cc: linux-mips@linux-mips.org
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: smp-mt,smp-cmp: Enable all HW IRQs on secondary CPUs</title>
<updated>2015-01-16T12:02:40+00:00</updated>
<author>
<name>James Hogan</name>
<email>james.hogan@imgtec.com</email>
</author>
<published>2015-01-16T11:10:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=c3f134fb395d3903f4c7cad53a9a844b2673ce9f'/>
<id>c3f134fb395d3903f4c7cad53a9a844b2673ce9f</id>
<content type='text'>
Commit 18743d2781d0 ("irqchip: mips-gic: Stop using per-platform mapping
tables") in v3.19-rc1 changed the routing of IPIs through the GIC to go
to the HW0 IRQ pin along with the rest of the GIC interrupts, rather
than to HW1 and HW2 pins.

This breaks SMP boot using the CMP or MT SMP implementations because HW0
doesn't get unmasked when secondary CPUs are initialised so the IPIs
will never interrupt secondary CPUs (nor any other interrupts routed
through the GIC).

Commit ff1e29ade4c6 ("MIPS: smp-cps: Enable all hardware interrupts on
secondary CPUs") fixed this in advance for the CPS SMP implementation by
unmasking all hardware interrupt lines for secondary CPUs, so lets do
the same for the CMP and MT implementations.

Fixes: 18743d2781d0 ("irqchip: mips-gic: Stop using per-platform mapping tables")
Signed-off-by: James Hogan &lt;james.hogan@imgtec.com&gt;
Cc: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Cc: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9025/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Commit 18743d2781d0 ("irqchip: mips-gic: Stop using per-platform mapping
tables") in v3.19-rc1 changed the routing of IPIs through the GIC to go
to the HW0 IRQ pin along with the rest of the GIC interrupts, rather
than to HW1 and HW2 pins.

This breaks SMP boot using the CMP or MT SMP implementations because HW0
doesn't get unmasked when secondary CPUs are initialised so the IPIs
will never interrupt secondary CPUs (nor any other interrupts routed
through the GIC).

Commit ff1e29ade4c6 ("MIPS: smp-cps: Enable all hardware interrupts on
secondary CPUs") fixed this in advance for the CPS SMP implementation by
unmasking all hardware interrupt lines for secondary CPUs, so lets do
the same for the CMP and MT implementations.

Fixes: 18743d2781d0 ("irqchip: mips-gic: Stop using per-platform mapping tables")
Signed-off-by: James Hogan &lt;james.hogan@imgtec.com&gt;
Cc: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Cc: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9025/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Move gic.h to include/linux/irqchip/mips-gic.h</title>
<updated>2014-11-24T06:44:59+00:00</updated>
<author>
<name>Andrew Bresticker</name>
<email>abrestic@chromium.org</email>
</author>
<published>2014-10-20T19:03:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=4060bbe9931eca2ed3c2124022a070a75d507472'/>
<id>4060bbe9931eca2ed3c2124022a070a75d507472</id>
<content type='text'>
Now that the MIPS GIC irqchip lives in drivers/irqchip/, move
its header over to include/linux/irqchip/.

Signed-off-by: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Cc: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Jason Cooper &lt;jason@lakedaemon.net&gt;
Cc: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Cc: John Crispin &lt;blogic@openwrt.org&gt;
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8129/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
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<pre>
Now that the MIPS GIC irqchip lives in drivers/irqchip/, move
its header over to include/linux/irqchip/.

Signed-off-by: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Cc: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Jason Cooper &lt;jason@lakedaemon.net&gt;
Cc: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Cc: John Crispin &lt;blogic@openwrt.org&gt;
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8129/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: SMP: Remove plat_smp_ops cpus_done method.</title>
<updated>2014-05-27T09:06:42+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2014-05-27T08:56:23+00:00</published>
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Nothing was using the method and there isn't any need for this hook.  This
leaves smp_cpus_done() empty for the moment.

As suggested by Paul Bolle &lt;pebolle@tiscali.nl&gt;.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
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<pre>
Nothing was using the method and there isn't any need for this hook.  This
leaves smp_cpus_done() empty for the moment.

As suggested by Paul Bolle &lt;pebolle@tiscali.nl&gt;.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
