linux.git/arch/mips/kernel/smp-cmp.c, branch v3.17

MIPS: SMP: Remove plat_smp_ops cpus_done method.

2014-05-27T09:06:42+00:00

Nothing was using the method and there isn't any need for this hook.  This
leaves smp_cpus_done() empty for the moment.

As suggested by Paul Bolle .

Signed-off-by: Ralf Baechle

MIPS: MT: Remove SMTC support

2014-05-23T22:07:01+00:00

Nobody is maintaining SMTC anymore and there also seems to be no userbase.
Which is a pity - the SMTC technology primarily developed by Kevin D.
Kissell  is an ingenious demonstration for the MT
ASE's power and elegance.

Based on Markos Chandras  patch
https://patchwork.linux-mips.org/patch/6719/ which while very similar did
no longer apply cleanly when I tried to merge it plus some additional
post-SMTC cleanup - SMTC was a feature as tricky to remove as it was to
merge once upon a time.

Signed-off-by: Ralf Baechle

MIPS: smp-cmp: Remove incorrect core number probe

2014-03-31T16:17:12+00:00

This probing is already done by decode_configs as part of cpu_probe, and
furthermore the implementation here was incorrect for any MT core with
a number of VPEs other than 2.

Signed-off-by: Paul Burton 
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6650/
Signed-off-by: Ralf Baechle

MIPS: Move GIC IPI functions out of smp-cmp.c

2014-03-06T20:25:22+00:00

The GIC IPI functions aren't necessarily specific to the "CMP
framework" SMP implementation, and will be used elsewhere in a
subsequent commit. This patch adds cleaned up GIC IPI functions to a
separate file which is compiled when a new CONFIG_MIPS_GIC_IPI Kconfig
symbol is selected, and selects that symbol for CONFIG_MIPS_CMP.

Signed-off-by: Paul Burton 
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6359/
Signed-off-by: Ralf Baechle

MIPS: kernel: smp-cmp: MIPS MT code needs CONFIG_MIPS_MT

2014-01-22T19:18:56+00:00

The mips_mt_* symbols are only built and exported if
CONFIG_MIPS_MT is enabled.

Fixes the following build problem when CONFIG_SMP is enabled
but CONFIG_MIPS_MT is not.

arch/mips/built-in.o: In function `cmp_prepare_cpus':
arch/mips/kernel/smp-cmp.c:197:
undefined reference to `mips_mt_set_cpuoptions'

Signed-off-by: Markos Chandras 
Signed-off-by: John Crispin 
Patchwork: http://patchwork.linux-mips.org/patch/5860/

MIPS: Fix SMP core calculations when using MT support.

2013-09-13T09:59:51+00:00

The TCBIND register is only available if the core has MT support. It
should not be read otherwise. Secondly, the number of TCs (siblings)
are calculated differently depending on if the kernel is configured
as SMVP or SMTC.

Signed-off-by: Leonid Yegoshin 
Signed-off-by: Steven J. Hill 
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5822/
Signed-off-by: Ralf Baechle

MIPS: Whitespace cleanup.

2013-02-01T09:00:22+00:00

Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.

Signed-off-by: Ralf Baechle

MIPS: CMP: Fix physical core number calculation logic

2012-10-18T09:45:41+00:00

The CPUNum Field in EBase register is 10bit wide, so after 1 bit right
shift, the mask value should be 0x1ff.

Signed-off-by: jerin jacob 
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/4420/
Signed-off-by: Ralf Baechle

MIPS: CMP/SMTC: Fix tc_id calculation

2012-08-27T14:10:13+00:00

Currently the tc_id code is:

  (read_c0_tcbind() >> TCBIND_CURTC_SHIFT) & TCBIND_CURTC;

After processing this becomes:

  (read_c0_tcbind() >> 21) & ((0xff) << 21)

But it should be:

  (read_c0_tcbind() & ((0xff)<< 21)) >> 21

Signed-off-by: RongQing.Li 
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/4077/
Signed-off-by: Ralf Baechle

Disintegrate asm/system.h for MIPS

2012-03-28T17:30:02+00:00

Disintegrate asm/system.h for MIPS.

Signed-off-by: David Howells 
Acked-by: Ralf Baechle 
cc: linux-mips@linux-mips.org