<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/arch/mips/kernel/setup.c, branch v3.17</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>MIPS: Add NUMA support for Loongson-3</title>
<updated>2014-07-30T19:46:19+00:00</updated>
<author>
<name>Huacai Chen</name>
<email>chenhc@lemote.com</email>
</author>
<published>2014-06-26T03:41:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=c46173183657bbdbe0d54a981c28807581648422'/>
<id>c46173183657bbdbe0d54a981c28807581648422</id>
<content type='text'>
Multiple Loongson-3A chips can be interconnected with HT0-bus. This is
a CC-NUMA system that every chip (node) has its own local memory and
cache coherency is maintained by hardware. The 64-bit physical memory
address format is as follows:

0x-0000-YZZZ-ZZZZ-ZZZZ

The high 16 bits should be 0, which means the real physical address
supported by Loongson-3 is 48-bit. The "Y" bits is the base address of
each node, which can be also considered as the node-id. The "Z" bits is
the address offset within a node, which means every node has a 44 bits
address space.

Macros XPHYSADDR and MAX_PHYSMEM_BITS are modified unconditionally,
because many other MIPS CPUs have also extended their address spaces.

Signed-off-by: Huacai Chen &lt;chenhc@lemote.com&gt;
Cc: John Crispin &lt;john@phrozen.org&gt;
Cc: Steven J. Hill &lt;Steven.Hill@imgtec.com&gt;
Cc: Aurelien Jarno &lt;aurelien@aurel32.net&gt;
Cc: linux-mips@linux-mips.org
Cc: Fuxin Zhang &lt;zhangfx@lemote.com&gt;
Cc: Zhangjin Wu &lt;wuzhangjin@gmail.com&gt;
Patchwork: https://patchwork.linux-mips.org/patch/7187/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Multiple Loongson-3A chips can be interconnected with HT0-bus. This is
a CC-NUMA system that every chip (node) has its own local memory and
cache coherency is maintained by hardware. The 64-bit physical memory
address format is as follows:

0x-0000-YZZZ-ZZZZ-ZZZZ

The high 16 bits should be 0, which means the real physical address
supported by Loongson-3 is 48-bit. The "Y" bits is the base address of
each node, which can be also considered as the node-id. The "Z" bits is
the address offset within a node, which means every node has a 44 bits
address space.

Macros XPHYSADDR and MAX_PHYSMEM_BITS are modified unconditionally,
because many other MIPS CPUs have also extended their address spaces.

Signed-off-by: Huacai Chen &lt;chenhc@lemote.com&gt;
Cc: John Crispin &lt;john@phrozen.org&gt;
Cc: Steven J. Hill &lt;Steven.Hill@imgtec.com&gt;
Cc: Aurelien Jarno &lt;aurelien@aurel32.net&gt;
Cc: linux-mips@linux-mips.org
Cc: Fuxin Zhang &lt;zhangfx@lemote.com&gt;
Cc: Zhangjin Wu &lt;wuzhangjin@gmail.com&gt;
Patchwork: https://patchwork.linux-mips.org/patch/7187/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Support hard limit of cpu count (nr_cpu_ids)</title>
<updated>2014-07-30T19:44:46+00:00</updated>
<author>
<name>Huacai Chen</name>
<email>chenhc@lemote.com</email>
</author>
<published>2014-06-26T03:41:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=0f3f506b275517250ee0169ec075d5382967f5f6'/>
<id>0f3f506b275517250ee0169ec075d5382967f5f6</id>
<content type='text'>
On MIPS currently, only the soft limit of cpu count (maxcpus) has its
effect, this patch enable the hard limit (nr_cpus) as well. Processor
cores which greater than maxcpus and less than nr_cpus can be taken up
via cpu hotplug. The code is borrowed from X86.

Signed-off-by: Huacai Chen &lt;chenhc@lemote.com&gt;
Reviewed-by: Andreas Herrmann &lt;andreas.herrmann@caviumnetworks.com&gt;
Cc: John Crispin &lt;john@phrozen.org&gt;
Cc: Steven J. Hill &lt;Steven.Hill@imgtec.com&gt;
Cc: Aurelien Jarno &lt;aurelien@aurel32.net&gt;
Cc: linux-mips@linux-mips.org
Cc: Fuxin Zhang &lt;zhangfx@lemote.com&gt;
Cc: Zhangjin Wu &lt;wuzhangjin@gmail.com&gt;
Patchwork: https://patchwork.linux-mips.org/patch/7183/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
On MIPS currently, only the soft limit of cpu count (maxcpus) has its
effect, this patch enable the hard limit (nr_cpus) as well. Processor
cores which greater than maxcpus and less than nr_cpus can be taken up
via cpu hotplug. The code is borrowed from X86.

Signed-off-by: Huacai Chen &lt;chenhc@lemote.com&gt;
Reviewed-by: Andreas Herrmann &lt;andreas.herrmann@caviumnetworks.com&gt;
Cc: John Crispin &lt;john@phrozen.org&gt;
Cc: Steven J. Hill &lt;Steven.Hill@imgtec.com&gt;
Cc: Aurelien Jarno &lt;aurelien@aurel32.net&gt;
Cc: linux-mips@linux-mips.org
Cc: Fuxin Zhang &lt;zhangfx@lemote.com&gt;
Cc: Zhangjin Wu &lt;wuzhangjin@gmail.com&gt;
Patchwork: https://patchwork.linux-mips.org/patch/7183/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Fix start of free memory when using initrd</title>
<updated>2013-10-29T20:24:23+00:00</updated>
<author>
<name>Greg Ungerer</name>
<email>gerg@snapgear.com</email>
</author>
<published>2010-09-08T05:50:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=f9a7febd82f413b9c8bafd40145bc398b7eb619f'/>
<id>f9a7febd82f413b9c8bafd40145bc398b7eb619f</id>
<content type='text'>
Currently when using an initrd on a MIPS system the start of the bootmem
region of memory is set to the larger of the end of the kernel bss region
(_end) or the end of the initrd. In a typical memory layout where the
initrd is at some address above the kernel image this means that the start
of the bootmem region will be the end of the initrd. But when we are done
processing/loading the initrd we have no way to reclaim the memory region
it occupied, and we lose a large chunk of now otherwise empty RAM from our
final running system.

The bootmem code is designed to allow this initrd to be reserved (and the
code in finalize_initrd() currently does this). When the initrd is finally
processed/loaded its reserved memory is freed.

Fix the setting of the start of the bootmem map to be the end of the kernel.

[ralf@linux-mips.org: fold in the fix of Ashok Kumar &lt;ashoks@broadcom.com&gt;.]

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1574/
Cc: Ashok Kumar &lt;ashoks@broadcom.com&gt;
Patchwork: https://patchwork.linux-mips.org/patch/5883/
Patchwork: https://patchwork.linux-mips.org/patch/6028/
Patchwork: https://patchwork.linux-mips.org/patch/6064/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Currently when using an initrd on a MIPS system the start of the bootmem
region of memory is set to the larger of the end of the kernel bss region
(_end) or the end of the initrd. In a typical memory layout where the
initrd is at some address above the kernel image this means that the start
of the bootmem region will be the end of the initrd. But when we are done
processing/loading the initrd we have no way to reclaim the memory region
it occupied, and we lose a large chunk of now otherwise empty RAM from our
final running system.

The bootmem code is designed to allow this initrd to be reserved (and the
code in finalize_initrd() currently does this). When the initrd is finally
processed/loaded its reserved memory is freed.

Fix the setting of the start of the bootmem map to be the end of the kernel.

[ralf@linux-mips.org: fold in the fix of Ashok Kumar &lt;ashoks@broadcom.com&gt;.]

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1574/
Cc: Ashok Kumar &lt;ashoks@broadcom.com&gt;
Patchwork: https://patchwork.linux-mips.org/patch/5883/
Patchwork: https://patchwork.linux-mips.org/patch/6028/
Patchwork: https://patchwork.linux-mips.org/patch/6064/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: kexec: Fix random crashes while loading crashkernel</title>
<updated>2013-09-05T18:53:43+00:00</updated>
<author>
<name>Prem Mallappa</name>
<email>prem.mallappa@gmail.com</email>
</author>
<published>2013-09-04T17:56:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=c2882b7fab9251309dc10c980b17e486f848502f'/>
<id>c2882b7fab9251309dc10c980b17e486f848502f</id>
<content type='text'>
Fixed compilation errors in case of non-KEXEC kernel
Rearranging code so that crashk_res gets updated.
- crashk_res is updated after mips_parse_crashkernel(),
   after resource_init(), which is after arch_mem_init().
- The reserved memory is actually treated as Usable memory,
   Unless we load the crash kernel, everything works.

Signed-off-by: Prem Mallappa &lt;pmallappa@caviumnetworks.com&gt;
Cc: linux-mips &lt;linux-mips@linux-mips.org&gt;
Patchwork: http://patchwork.linux-mips.org/patch/5805/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Fixed compilation errors in case of non-KEXEC kernel
Rearranging code so that crashk_res gets updated.
- crashk_res is updated after mips_parse_crashkernel(),
   after resource_init(), which is after arch_mem_init().
- The reserved memory is actually treated as Usable memory,
   Unless we load the crash kernel, everything works.

Signed-off-by: Prem Mallappa &lt;pmallappa@caviumnetworks.com&gt;
Cc: linux-mips &lt;linux-mips@linux-mips.org&gt;
Patchwork: http://patchwork.linux-mips.org/patch/5805/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: add detect_memory_region()</title>
<updated>2013-05-07T23:19:11+00:00</updated>
<author>
<name>John Crispin</name>
<email>blogic@openwrt.org</email>
</author>
<published>2013-04-13T11:15:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=4d9f77d2526840fc2b3d4dcaedfd2f633a6d5426'/>
<id>4d9f77d2526840fc2b3d4dcaedfd2f633a6d5426</id>
<content type='text'>
Add a generic way of detecting the available RAM. This function is based on the
implementation already used by ath79.

Signed-off-by: John Crispin &lt;blogic@openwrt.org&gt;
Patchwork: http://patchwork.linux-mips.org/patch/5178/
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add a generic way of detecting the available RAM. This function is based on the
implementation already used by ath79.

Signed-off-by: John Crispin &lt;blogic@openwrt.org&gt;
Patchwork: http://patchwork.linux-mips.org/patch/5178/
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'mips-next-3.9' of git://git.linux-mips.org/pub/scm/john/linux-john into mips-for-linux-next</title>
<updated>2013-02-21T11:51:33+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2013-02-21T11:51:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=8bfc245f9ad7bd4e461179e4e7852ef99b8b6144'/>
<id>8bfc245f9ad7bd4e461179e4e7852ef99b8b6144</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>mips: reserve elfcorehdr</title>
<updated>2013-02-19T08:36:23+00:00</updated>
<author>
<name>Corey Minyard</name>
<email>cminyard@mvista.com</email>
</author>
<published>2013-02-12T19:41:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=4893fc8856a81d2037c1c976cb320be6f00e84a0'/>
<id>4893fc8856a81d2037c1c976cb320be6f00e84a0</id>
<content type='text'>
/proc/vmcore wasn't showing up in kdump kernels.  It turns that that
for Octeon, the memory used by elfcorehdr wasn't being set aside
properly and it was getting clobbered before /proc/vmcore could get
it.  So reserve the memory if it shows up in a memory area managed
by the kernel.

Signed-off-by: Corey Minyard &lt;cminyard@mvista.com&gt;
Acked-by: David Daney  &lt;ddaney@caviumnetworks.com&gt;
Cc: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Patchwork: http://patchwork.linux-mips.org/patch/4936/
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
/proc/vmcore wasn't showing up in kdump kernels.  It turns that that
for Octeon, the memory used by elfcorehdr wasn't being set aside
properly and it was getting clobbered before /proc/vmcore could get
it.  So reserve the memory if it shows up in a memory area managed
by the kernel.

Signed-off-by: Corey Minyard &lt;cminyard@mvista.com&gt;
Acked-by: David Daney  &lt;ddaney@caviumnetworks.com&gt;
Cc: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Patchwork: http://patchwork.linux-mips.org/patch/4936/
</pre>
</div>
</content>
</entry>
<entry>
<title>mips: Make sure kernel memory is in iomem</title>
<updated>2013-02-19T08:36:15+00:00</updated>
<author>
<name>Corey Minyard</name>
<email>cminyard@mvista.com</email>
</author>
<published>2013-02-12T19:41:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=d3ff9338023236f39332b07b3afed76c490a5041'/>
<id>d3ff9338023236f39332b07b3afed76c490a5041</id>
<content type='text'>
Kernel memory isn't necessarily added to the memory tables, so it
wouldn't show up in /proc/iomem.  This was breaking kdump, which
requires these memory addresses to work correctly.

Signed-off-by: Corey Minyard &lt;cminyard@mvista.com&gt;
Acked-by: David Daney &lt;ddaney@caviumnetworks.com&gt;
Cc: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Patchwork: http://patchwork.linux-mips.org/patch/4937/
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Kernel memory isn't necessarily added to the memory tables, so it
wouldn't show up in /proc/iomem.  This was breaking kdump, which
requires these memory addresses to work correctly.

Signed-off-by: Corey Minyard &lt;cminyard@mvista.com&gt;
Acked-by: David Daney &lt;ddaney@caviumnetworks.com&gt;
Cc: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Patchwork: http://patchwork.linux-mips.org/patch/4937/
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Whitespace cleanup.</title>
<updated>2013-02-01T09:00:22+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2013-01-22T11:59:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=7034228792cc561e79ff8600f02884bd4c80e287'/>
<id>7034228792cc561e79ff8600f02884bd4c80e287</id>
<content type='text'>
Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: kdump: Add support</title>
<updated>2012-12-13T15:46:47+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2012-10-11T16:14:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=7aa1c8f47e7e792d11f898cbdddaf6fa21ff08cc'/>
<id>7aa1c8f47e7e792d11f898cbdddaf6fa21ff08cc</id>
<content type='text'>
[ralf@linux-mips.org: Original patch by Maxim Uvarov &lt;muvarov@gmail.com&gt;
with plenty of further shining, polishing, debugging and testing by me.]

Signed-off-by: Maxim Uvarov &lt;muvarov@gmail.com&gt;
Cc: linux-mips@linux-mips.org
Cc: kexec@lists.infradead.org
Cc: horms@verge.net.au
Patchwork: https://patchwork.linux-mips.org/patch/1025/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
[ralf@linux-mips.org: Original patch by Maxim Uvarov &lt;muvarov@gmail.com&gt;
with plenty of further shining, polishing, debugging and testing by me.]

Signed-off-by: Maxim Uvarov &lt;muvarov@gmail.com&gt;
Cc: linux-mips@linux-mips.org
Cc: kexec@lists.infradead.org
Cc: horms@verge.net.au
Patchwork: https://patchwork.linux-mips.org/patch/1025/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
