<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux.git/arch/mips/kernel/irq_cpu.c, branch master</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>MIPS/IRQCHIP: Move irq_chip from arch/mips to drivers/irqchip.</title>
<updated>2015-06-21T19:52:50+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2015-05-26T16:20:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=67e38cf2933e904426b428431961e4880d6d4b90'/>
<id>67e38cf2933e904426b428431961e4880d6d4b90</id>
<content type='text'>
While at it, rename it because in drivers/irqchip no longer every CPU is
a MIPS.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
While at it, rename it because in drivers/irqchip no longer every CPU is
a MIPS.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: IRQ: Fix disable_irq on CPU IRQs</title>
<updated>2015-01-16T13:03:17+00:00</updated>
<author>
<name>Felix Fietkau</name>
<email>nbd@openwrt.org</email>
</author>
<published>2015-01-15T18:05:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=a3e6c1eff54878506b2dddcc202df9cc8180facb'/>
<id>a3e6c1eff54878506b2dddcc202df9cc8180facb</id>
<content type='text'>
If the irq_chip does not define .irq_disable, any call to disable_irq
will defer disabling the IRQ until it fires while marked as disabled.
This assumes that the handler function checks for this condition, which
handle_percpu_irq does not. In this case, calling disable_irq leads to
an IRQ storm, if the interrupt fires while disabled.

This optimization is only useful when disabling the IRQ is slow, which
is not true for the MIPS CPU IRQ.

Disable this optimization by implementing .irq_disable and .irq_enable

Signed-off-by: Felix Fietkau &lt;nbd@openwrt.org&gt;
Cc: stable@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8949/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
If the irq_chip does not define .irq_disable, any call to disable_irq
will defer disabling the IRQ until it fires while marked as disabled.
This assumes that the handler function checks for this condition, which
handle_percpu_irq does not. In this case, calling disable_irq leads to
an IRQ storm, if the interrupt fires while disabled.

This optimization is only useful when disabling the IRQ is slow, which
is not true for the MIPS CPU IRQ.

Disable this optimization by implementing .irq_disable and .irq_enable

Signed-off-by: Felix Fietkau &lt;nbd@openwrt.org&gt;
Cc: stable@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8949/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Set vint handler when mapping CPU interrupts</title>
<updated>2014-11-24T06:44:52+00:00</updated>
<author>
<name>Andrew Bresticker</name>
<email>abrestic@chromium.org</email>
</author>
<published>2014-09-18T21:47:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=f64e55dcbf84f107a68974a0734b3c31db97f169'/>
<id>f64e55dcbf84f107a68974a0734b3c31db97f169</id>
<content type='text'>
When mapping an interrupt in the CPU IRQ domain, set the vint handler
for that interrupt if the CPU uses vectored interrupt handling.

Signed-off-by: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Reviewed-by: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Tested-by: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Jason Cooper &lt;jason@lakedaemon.net&gt;
Cc: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Cc: Jeffrey Deans &lt;jeffrey.deans@imgtec.com&gt;
Cc: Markos Chandras &lt;markos.chandras@imgtec.com&gt;
Cc: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Cc: Jonas Gorski &lt;jogo@openwrt.org&gt;
Cc: John Crispin &lt;blogic@openwrt.org&gt;
Cc: David Daney &lt;ddaney.cavm@gmail.com&gt;
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7802/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When mapping an interrupt in the CPU IRQ domain, set the vint handler
for that interrupt if the CPU uses vectored interrupt handling.

Signed-off-by: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Reviewed-by: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Tested-by: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Jason Cooper &lt;jason@lakedaemon.net&gt;
Cc: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Cc: Jeffrey Deans &lt;jeffrey.deans@imgtec.com&gt;
Cc: Markos Chandras &lt;markos.chandras@imgtec.com&gt;
Cc: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Cc: Jonas Gorski &lt;jogo@openwrt.org&gt;
Cc: John Crispin &lt;blogic@openwrt.org&gt;
Cc: David Daney &lt;ddaney.cavm@gmail.com&gt;
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7802/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Provide a generic plat_irq_dispatch</title>
<updated>2014-11-24T06:44:52+00:00</updated>
<author>
<name>Andrew Bresticker</name>
<email>abrestic@chromium.org</email>
</author>
<published>2014-09-18T21:47:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=85f7cdacbb81db8c4cc8e474837eab1f0e4ff77b'/>
<id>85f7cdacbb81db8c4cc8e474837eab1f0e4ff77b</id>
<content type='text'>
For platforms which boot with device-tree or have correctly chained
all external interrupt controllers, a generic plat_irq_dispatch() can
be used.  Implement a plat_irq_dispatch() which simply handles all the
pending interrupts as reported by C0_Cause.

Signed-off-by: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Reviewed-by: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Tested-by: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Jason Cooper &lt;jason@lakedaemon.net&gt;
Cc: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Cc: Jeffrey Deans &lt;jeffrey.deans@imgtec.com&gt;
Cc: Markos Chandras &lt;markos.chandras@imgtec.com&gt;
Cc: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Cc: Jonas Gorski &lt;jogo@openwrt.org&gt;
Cc: John Crispin &lt;blogic@openwrt.org&gt;
Cc: David Daney &lt;ddaney.cavm@gmail.com&gt;
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7801/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
For platforms which boot with device-tree or have correctly chained
all external interrupt controllers, a generic plat_irq_dispatch() can
be used.  Implement a plat_irq_dispatch() which simply handles all the
pending interrupts as reported by C0_Cause.

Signed-off-by: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Reviewed-by: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Tested-by: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Jason Cooper &lt;jason@lakedaemon.net&gt;
Cc: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Cc: Jeffrey Deans &lt;jeffrey.deans@imgtec.com&gt;
Cc: Markos Chandras &lt;markos.chandras@imgtec.com&gt;
Cc: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Cc: Jonas Gorski &lt;jogo@openwrt.org&gt;
Cc: John Crispin &lt;blogic@openwrt.org&gt;
Cc: David Daney &lt;ddaney.cavm@gmail.com&gt;
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7801/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Rename mips_cpu_intc_init() -&gt; mips_cpu_irq_of_init()</title>
<updated>2014-11-24T06:44:52+00:00</updated>
<author>
<name>Andrew Bresticker</name>
<email>abrestic@chromium.org</email>
</author>
<published>2014-09-18T21:47:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=afe8dc254711b72ba8144295f4a8fcc66d30572d'/>
<id>afe8dc254711b72ba8144295f4a8fcc66d30572d</id>
<content type='text'>
mips_cpu_intc_init() is used for DT-based initialization of the CPU
IRQ domain.  Give it a more appropriate name.

Signed-off-by: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Reviewed-by: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Tested-by: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Jason Cooper &lt;jason@lakedaemon.net&gt;
Cc: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Cc: Jeffrey Deans &lt;jeffrey.deans@imgtec.com&gt;
Cc: Markos Chandras &lt;markos.chandras@imgtec.com&gt;
Cc: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Cc: Jonas Gorski &lt;jogo@openwrt.org&gt;
Cc: John Crispin &lt;blogic@openwrt.org&gt;
Cc: David Daney &lt;ddaney.cavm@gmail.com&gt;
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7800/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
mips_cpu_intc_init() is used for DT-based initialization of the CPU
IRQ domain.  Give it a more appropriate name.

Signed-off-by: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Reviewed-by: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Tested-by: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Jason Cooper &lt;jason@lakedaemon.net&gt;
Cc: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Cc: Jeffrey Deans &lt;jeffrey.deans@imgtec.com&gt;
Cc: Markos Chandras &lt;markos.chandras@imgtec.com&gt;
Cc: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Cc: Jonas Gorski &lt;jogo@openwrt.org&gt;
Cc: John Crispin &lt;blogic@openwrt.org&gt;
Cc: David Daney &lt;ddaney.cavm@gmail.com&gt;
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7800/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Always use IRQ domains for CPU IRQs</title>
<updated>2014-11-24T06:44:51+00:00</updated>
<author>
<name>Andrew Bresticker</name>
<email>abrestic@chromium.org</email>
</author>
<published>2014-09-18T21:47:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=0f84c305351c993e4307e1e8c128d44760314e31'/>
<id>0f84c305351c993e4307e1e8c128d44760314e31</id>
<content type='text'>
Use an IRQ domain for the 8 CPU IRQs in both the DT and non-DT cases.

Signed-off-by: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Reviewed-by: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Tested-by: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Jason Cooper &lt;jason@lakedaemon.net&gt;
Cc: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Cc: Jeffrey Deans &lt;jeffrey.deans@imgtec.com&gt;
Cc: Markos Chandras &lt;markos.chandras@imgtec.com&gt;
Cc: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Cc: Jonas Gorski &lt;jogo@openwrt.org&gt;
Cc: John Crispin &lt;blogic@openwrt.org&gt;
Cc: David Daney &lt;ddaney.cavm@gmail.com&gt;
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7799/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Use an IRQ domain for the 8 CPU IRQs in both the DT and non-DT cases.

Signed-off-by: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Reviewed-by: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Tested-by: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Jason Cooper &lt;jason@lakedaemon.net&gt;
Cc: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Cc: Jeffrey Deans &lt;jeffrey.deans@imgtec.com&gt;
Cc: Markos Chandras &lt;markos.chandras@imgtec.com&gt;
Cc: Paul Burton &lt;paul.burton@imgtec.com&gt;
Cc: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Cc: Jonas Gorski &lt;jogo@openwrt.org&gt;
Cc: John Crispin &lt;blogic@openwrt.org&gt;
Cc: David Daney &lt;ddaney.cavm@gmail.com&gt;
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7799/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Panic messages should not end in \n.</title>
<updated>2013-10-29T20:24:19+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2013-09-18T14:05:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=f7777dcc7550531ae551f544bdc391c65d0e1731'/>
<id>f7777dcc7550531ae551f544bdc391c65d0e1731</id>
<content type='text'>
Panic() is going to add a \n itself and it's annoying if a panic message rolls
of the screen on a device with no scrollback.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Panic() is going to add a \n itself and it's annoying if a panic message rolls
of the screen on a device with no scrollback.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'mips-next-3.9' of git://git.linux-mips.org/pub/scm/john/linux-john into mips-for-linux-next</title>
<updated>2013-02-21T11:51:33+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2013-02-21T11:51:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=8bfc245f9ad7bd4e461179e4e7852ef99b8b6144'/>
<id>8bfc245f9ad7bd4e461179e4e7852ef99b8b6144</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: add irqdomain support for the CPU IRQ controller</title>
<updated>2013-02-17T00:25:34+00:00</updated>
<author>
<name>Gabor Juhos</name>
<email>juhosg@openwrt.org</email>
</author>
<published>2013-01-31T12:20:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=0916b46962cbcac9465d253d0a398435b3965fd5'/>
<id>0916b46962cbcac9465d253d0a398435b3965fd5</id>
<content type='text'>
Add code to load a irq_domain for the MIPS IRQ controller from a devicetree
file.

Signed-off-by: Gabor Juhos &lt;juhosg@openwrt.org&gt;
Signed-off-by: John Crispin &lt;blogic@openwrt.org&gt;
Acked-by: David Daney &lt;david.daney@cavium.com&gt;
Patchwork: http://patchwork.linux-mips.org/patch/4902/
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add code to load a irq_domain for the MIPS IRQ controller from a devicetree
file.

Signed-off-by: Gabor Juhos &lt;juhosg@openwrt.org&gt;
Signed-off-by: John Crispin &lt;blogic@openwrt.org&gt;
Acked-by: David Daney &lt;david.daney@cavium.com&gt;
Patchwork: http://patchwork.linux-mips.org/patch/4902/
</pre>
</div>
</content>
</entry>
<entry>
<title>MIPS: Whitespace cleanup.</title>
<updated>2013-02-01T09:00:22+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2013-01-22T11:59:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=7034228792cc561e79ff8600f02884bd4c80e287'/>
<id>7034228792cc561e79ff8600f02884bd4c80e287</id>
<content type='text'>
Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
