linux.git/arch/mips/kernel/genex.S, branch v3.10

MIPS: Idle: Break r4k_wait into two functions and fix it.

2013-05-21T23:34:28+00:00

local_irq_enable() may expand into very different code, so it rather should
stay in C.  Also this keeps the assembler code size constant which keeps
the rollback code simple.  So it's best to split r4k_wait into two parts,
one C and one assembler.

Finally add the local_irq_enable() to r4k_wait to ensure the WAIT
instruction in __r4k_wait() will work properly.

Signed-off-by: Ralf Baechle

Revert "MIPS: Allow ASID size to be determined at boot time."

2013-05-16T18:35:42+00:00

This reverts commit d532f3d26716a39dfd4b88d687bd344fbe77e390.

The original commit has several problems:

1) Doesn't work with 64-bit kernels.

2) Calls TLBMISS_HANDLER_SETUP() before the code is generated.

3) Calls TLBMISS_HANDLER_SETUP() twice in per_cpu_trap_init() when
   only one call is needed.

[ralf@linux-mips.org: Also revert the bits of the ASID patch which were
hidden in the KVM merge.]

Signed-off-by: David Daney 
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: "Steven J. Hill" 
Cc: David Daney 
Patchwork: https://patchwork.linux-mips.org/patch/5242/
Signed-off-by: Ralf Baechle

MIPS: microMIPS: Add support for exception handling.

2013-05-09T15:55:18+00:00

All exceptions must be taken in microMIPS mode, never in classic
MIPS mode or the kernel falls apart. A few NOP instructions are
used to maintain the correct alignment of microMIPS versions of
the exception vectors.

Signed-off-by: Steven J. Hill

MIPS: Allow ASID size to be determined at boot time.

2013-05-08T10:30:10+00:00

Original patch by Ralf Baechle and removed by Harold Koerfgen
with commit f67e4ffc79905482c3b9b8c8dd65197bac7eb508. This
allows for more generic kernels since the size of the ASID
and corresponding masks can be determined at run-time. This
patch is also required for the new Aptiv cores and has been
tested on Malta and Malta Aptiv platforms.

[ralf@linux-mips.org: Added relevant part of fix
https://patchwork.linux-mips.org/patch/5213/]

Signed-off-by: Steven J. Hill 
Signed-off-by: Ralf Baechle

MIPS: Whitespace cleanup.

2013-02-01T09:00:22+00:00

Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.

Signed-off-by: Ralf Baechle

MIPS: Switch remaining assembler PAGE_SIZE users to .

2012-12-28T16:04:16+00:00

Signed-off-by: Ralf Baechle

MIPS: Read watch registers with interrupts disabled.

2009-01-30T21:32:58+00:00

If a context switch occurred between the watch exception and reading the
watch registers, it would be possible for the new process to corrupt their
state.  Enabling interrupts only after the watch registers are read avoids
this race.

Signed-off-by: David Daney 
Signed-off-by: Ralf Baechle

MIPS: Override assembler target architecture for octeon.

2009-01-11T09:57:21+00:00

Gas from binutils 2.19 fails to compile some cop1 instructions with
-march=octeon.  Since the cop1 instructions are present in mips1, use
that arch instead.  This will be fixed in binutils 2.20.

Signed-off-by: David Daney 
Signed-off-by: Ralf Baechle

MIPS: Watch exception handling for HARDWARE_WATCHPOINTS.

2008-10-11T15:18:56+00:00

Here we hook up the watch exception handler so that it sends SIGTRAP when
the hardware watch registers are triggered.

Signed-off-by: David Daney 
Signed-off-by: Ralf Baechle

[MIPS] SMTC: Fix SMTC dyntick support.

2008-10-03T16:58:58+00:00

Rework of SMTC support to make it work with the new clock event system,
allowing "tickless" operation, and to make it compatible with the use of
the "wait_irqoff" idle loop.  The new clocking scheme means that the
previously optional IPI instant replay mechanism is now required, and has
been made more robust.

Signed-off-by: Kevin D. Kissell 
Signed-off-by: Ralf Baechle