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<title>linux.git/arch/mips/dec/setup.c, branch v2.6.30</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>[MIPS] Deforest the function pointer jungle in the time code.</title>
<updated>2007-10-11T22:46:08+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2007-10-11T22:46:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=4b550488f894c899aa54dc935c8fee47bca2b7df'/>
<id>4b550488f894c899aa54dc935c8fee47bca2b7df</id>
<content type='text'>
Hard to follow who is pointing what to where and why so it's simply getting
in the way of the time code renovation.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
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<pre>
Hard to follow who is pointing what to where and why so it's simply getting
in the way of the time code renovation.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[MIPS] DEC: Initialise ioasic_ssr_lock</title>
<updated>2007-09-19T18:33:14+00:00</updated>
<author>
<name>Maciej W. Rozycki</name>
<email>macro@linux-mips.org</email>
</author>
<published>2007-09-17T15:58:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=68835999435e01311ab57f5556169ad2966b6828'/>
<id>68835999435e01311ab57f5556169ad2966b6828</id>
<content type='text'>
Fix the definition of the ioasic_ssr_lock spinlock to include a proper 
initialisation.

Signed-off-by: Maciej W. Rozycki &lt;macro@linux-mips.org&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
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<pre>
Fix the definition of the ioasic_ssr_lock spinlock to include a proper 
initialisation.

Signed-off-by: Maciej W. Rozycki &lt;macro@linux-mips.org&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[TC] TURBOchannel support for the DECstation</title>
<updated>2007-02-09T16:23:16+00:00</updated>
<author>
<name>Maciej W. Rozycki</name>
<email>macro@linux-mips.org</email>
</author>
<published>2007-02-06T00:28:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=33cf45b90eb73e1f3b784b50691d74f7ea381b21'/>
<id>33cf45b90eb73e1f3b784b50691d74f7ea381b21</id>
<content type='text'>
This is the platform-specific part of TURBOchannel bus support for the
DECstation.  It implements determining whether the bus is actually there,
getting bus parameters, IRQ assignments for devices and protected accesses
to possibly unoccupied slots that may trigger bus error exceptions.

Signed-off-by: Maciej W. Rozycki &lt;macro@linux-mips.org&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
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<pre>
This is the platform-specific part of TURBOchannel bus support for the
DECstation.  It implements determining whether the bus is actually there,
getting bus parameters, IRQ assignments for devices and protected accesses
to possibly unoccupied slots that may trigger bus error exceptions.

Signed-off-by: Maciej W. Rozycki &lt;macro@linux-mips.org&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[MIPS] Define MIPS_CPU_IRQ_BASE in generic header</title>
<updated>2007-02-06T16:53:08+00:00</updated>
<author>
<name>Atsushi Nemoto</name>
<email>anemo@mba.ocn.ne.jp</email>
</author>
<published>2007-01-07T17:14:29+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=97dcb82de6cc99a5669eb8e342efc24cceb1e77e'/>
<id>97dcb82de6cc99a5669eb8e342efc24cceb1e77e</id>
<content type='text'>
The irq_base for {mips,rm7k,rm9k}_cpu_irq_init() are constant on all
platforms and are same value on most platforms (0 or 16, depends on
CONFIG_I8259).  Define them in asm-mips/mach-generic/irq.h and make
them customizable.  This will save a few cycle on each CPU interrupt.

A good side effect is removing some dependencies to MALTA in generic
SMTC code.

Although MIPS_CPU_IRQ_BASE is customizable, this patch changes irq
mappings on DDB5477, EMMA2RH and MIPS_SIM, since really customizing
them might cause some header dependency problem and there seems no
good reason to customize it.  So currently only VR41XX is using custom
MIPS_CPU_IRQ_BASE value, which is 0 regardless of CONFIG_I8259.

Testing this patch on those platforms is greatly appreciated.  Thank
you.

Signed-off-by: Atsushi Nemoto &lt;anemo@mba.ocn.ne.jp&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
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<pre>
The irq_base for {mips,rm7k,rm9k}_cpu_irq_init() are constant on all
platforms and are same value on most platforms (0 or 16, depends on
CONFIG_I8259).  Define them in asm-mips/mach-generic/irq.h and make
them customizable.  This will save a few cycle on each CPU interrupt.

A good side effect is removing some dependencies to MALTA in generic
SMTC code.

Although MIPS_CPU_IRQ_BASE is customizable, this patch changes irq
mappings on DDB5477, EMMA2RH and MIPS_SIM, since really customizing
them might cause some header dependency problem and there seems no
good reason to customize it.  So currently only VR41XX is using custom
MIPS_CPU_IRQ_BASE value, which is 0 regardless of CONFIG_I8259.

Testing this patch on those platforms is greatly appreciated.  Thank
you.

Signed-off-by: Atsushi Nemoto &lt;anemo@mba.ocn.ne.jp&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[MIPS] do_IRQ cleanup</title>
<updated>2006-11-30T01:14:49+00:00</updated>
<author>
<name>Atsushi Nemoto</name>
<email>anemo@mba.ocn.ne.jp</email>
</author>
<published>2006-10-25T14:57:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=187933f23679c413706030aefad9e85e79164c44'/>
<id>187933f23679c413706030aefad9e85e79164c44</id>
<content type='text'>
Now we have both function and macro version of do_IRQ() and the former
is used only by DEC and non-preemptive kernel.  This patch makes
everyone use the macro version and removes the function version.

Signed-off-by: Atsushi Nemoto &lt;anemo@mba.ocn.ne.jp&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
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<pre>
Now we have both function and macro version of do_IRQ() and the former
is used only by DEC and non-preemptive kernel.  This patch makes
everyone use the macro version and removes the function version.

Signed-off-by: Atsushi Nemoto &lt;anemo@mba.ocn.ne.jp&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[MIPS] DEC: pt_regs fixes for dec_intr_halt.</title>
<updated>2006-10-08T23:15:27+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2006-10-08T16:38:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=d62801e961e148313910ec430e230e488fadc196'/>
<id>d62801e961e148313910ec430e230e488fadc196</id>
<content type='text'>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
<content type='xhtml'>
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<pre>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[MIPS] Replace board_timer_setup function pointer by plat_timer_setup.</title>
<updated>2006-07-13T20:26:17+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2006-07-09T20:38:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=54d0a216f40e060ba4265bb851cc36b3ca55d1a8'/>
<id>54d0a216f40e060ba4265bb851cc36b3ca55d1a8</id>
<content type='text'>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;

---
</content>
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<pre>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;

---
</pre>
</div>
</content>
</entry>
<entry>
<title>[PATCH] irq-flags: MIPS: Use the new IRQF_ constants</title>
<updated>2006-07-02T20:58:47+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2006-07-02T02:29:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=f40298fddcc3c8115c6135c9733f5a0de52dcea9'/>
<id>f40298fddcc3c8115c6135c9733f5a0de52dcea9</id>
<content type='text'>
Use the new IRQF_ constants and remove the SA_INTERRUPT define

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Ingo Molnar &lt;mingo@elte.hu&gt;
Cc: "David S. Miller" &lt;davem@davemloft.net&gt;
Cc: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Cc: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Signed-off-by: Andrew Morton &lt;akpm@osdl.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</content>
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<pre>
Use the new IRQF_ constants and remove the SA_INTERRUPT define

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Ingo Molnar &lt;mingo@elte.hu&gt;
Cc: "David S. Miller" &lt;davem@davemloft.net&gt;
Cc: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Cc: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Signed-off-by: Andrew Morton &lt;akpm@osdl.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[MIPS] Cleanup memory managment initialization.</title>
<updated>2006-06-19T16:39:23+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2006-06-18T00:32:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=2925aba4223f4532e85f0c6f64584b3e0b2849c3'/>
<id>2925aba4223f4532e85f0c6f64584b3e0b2849c3</id>
<content type='text'>
Historically plat_mem_setup did the entire platform initialization.  This
was rather impractical because it meant plat_mem_setup had to get away
without any kind of memory allocator.  To keep old code from breaking
plat_setup was just renamed to plat_setup and a second platform
initialization hook for anything else was introduced.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
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<pre>
Historically plat_mem_setup did the entire platform initialization.  This
was rather impractical because it meant plat_mem_setup had to get away
without any kind of memory allocator.  To keep old code from breaking
plat_setup was just renamed to plat_setup and a second platform
initialization hook for anything else was introduced.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>[MIPS] Rewrite all the assembler interrupt handlers to C.</title>
<updated>2006-04-19T02:14:21+00:00</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2006-04-03T16:56:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=e4ac58afdfac792c0583af30dbd9eae53e24c78b'/>
<id>e4ac58afdfac792c0583af30dbd9eae53e24c78b</id>
<content type='text'>
Saves like 1,600 lines of code, is way easier to debug, compilers
frequently do a better job than the cut and paste type of handlers many
boards had.  And finally having all the stuff done in a single place
also means alot of bug potencial for the MT ASE is gone.

The only surviving handler in assembler is the DECstation one; I hope
Maciej will rewrite it.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Saves like 1,600 lines of code, is way easier to debug, compilers
frequently do a better job than the cut and paste type of handlers many
boards had.  And finally having all the stuff done in a single place
also means alot of bug potencial for the MT ASE is gone.

The only surviving handler in assembler is the DECstation one; I hope
Maciej will rewrite it.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</pre>
</div>
</content>
</entry>
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