linux.git/arch/mips/boot/dts/realtek, branch vsnprintf Linux kernel source tree mips: dts: realtek: Add SPI NAND controller 2024-11-20T22:45:45+00:00 Chris Packham chris.packham@alliedtelesis.co.nz 2024-10-15T22:54:33+00:00 5a38a5d40f2fa01591ab961ff37385a74b1ec7e1 Add the SPI-NAND controller on the RTL9300 family of devices. This supports serial/dual/quad data width and DMA for read/program operations. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> 
Add the SPI-NAND controller on the RTL9300 family of devices. This
supports serial/dual/quad data width and DMA for read/program
operations.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
mips: dts: realtek: Add I2C controllers 2024-11-12T14:51:21+00:00 Chris Packham chris.packham@alliedtelesis.co.nz 2024-11-06T00:18:34+00:00 56131e6d1fcce8e7359a2445711cc1a4ddb8325c Add the I2C controllers that are part of the RTL9300 SoC. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> 
Add the I2C controllers that are part of the RTL9300 SoC.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
mips: dts: realtek: Add syscon-reboot node 2024-11-12T14:51:09+00:00 Chris Packham chris.packham@alliedtelesis.co.nz 2024-11-06T00:18:33+00:00 5ec37be43fe73c21b4b52c4d7f9c400221bdbacf The board level reset on systems using the RTL9302 can be driven via the switch. Use a syscon-reboot node to represent this. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> 
The board level reset on systems using the RTL9302 can be driven via the
switch. Use a syscon-reboot node to represent this.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
mips: dts: realtek: Add RTL9302C board 2024-07-12T11:12:16+00:00 Chris Packham chris.packham@alliedtelesis.co.nz 2024-07-10T04:35:24+00:00 74beefb5935a67f9fa60f8103e3f69d42d6a08d7 Add support for the RTL9302 SoC and the RTL9302C_2xRTL8224_2XGE reference board. The RTL930x family of SoCs are Realtek switches with an embedded MIPS core (800MHz 34Kc). Most of the peripherals are similar to the RTL838x SoC and can make use of many existing drivers. Add in full DSA switch support is still a work in progress. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> 
Add support for the RTL9302 SoC and the RTL9302C_2xRTL8224_2XGE
reference board.

The RTL930x family of SoCs are Realtek switches with an embedded MIPS
core (800MHz 34Kc). Most of the peripherals are similar to the RTL838x
SoC and can make use of many existing drivers.

Add in full DSA switch support is still a work in progress.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
mips: dts: realtek: add device_type property to cpu node 2024-07-12T11:11:26+00:00 Chris Packham chris.packham@alliedtelesis.co.nz 2024-07-10T04:35:16+00:00 75eb0cbe6e2220feffc7c6219b7dc80c56068bb9 Add device_type = "cpu" to the cpu node for the rtl838x SoC. This resolves the following dtbs_check complaint: cpus: cpu@0: 'cache-level' is a required property Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Reviewed-by: Marek Behún <kabel@kernel.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> 
Add device_type = "cpu" to the cpu node for the rtl838x SoC. This
resolves the following dtbs_check complaint:

 cpus: cpu@0: 'cache-level' is a required property

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
mips: dts: realtek: use "serial" instead of "uart" in node name 2024-07-12T11:11:20+00:00 Chris Packham chris.packham@alliedtelesis.co.nz 2024-07-10T04:35:15+00:00 b1428c6860af10649cead288b8fc81efec6115c2 Update the node name for the UARTs to resolve the following dtbs_check complaints: uart@2000: $nodename:0: 'uart@2000' does not match '^serial(@.*)?$' uart@2100: $nodename:0: 'uart@2100' does not match '^serial(@.*)?$' Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Reviewed-by: Marek Behún <kabel@kernel.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> 
Update the node name for the UARTs to resolve the following dtbs_check
complaints:

  uart@2000: $nodename:0: 'uart@2000' does not match '^serial(@.*)?$'
  uart@2100: $nodename:0: 'uart@2100' does not match '^serial(@.*)?$'

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
mips: dts: Add support for Cisco SG220-26 switch 2021-02-04T20:54:20+00:00 Bert Vermeulen bert@biot.com 2021-01-19T09:21:09+00:00 8991ae593ca25b8239472e68fd18504143b90465 Signed-off-by: Bert Vermeulen <bert@biot.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> 
Signed-off-by: Bert Vermeulen <bert@biot.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Add support for Realtek RTL838x/RTL839x switch SoCs 2021-02-04T19:17:54+00:00 Bert Vermeulen bert@biot.com 2021-01-19T09:21:06+00:00 671841d254b81939bde21e68ad16402ccca42901 The RTL838x/839x family of SoCs are Realtek switches with an embedded MIPS core. * RTL838x - 500MHz 4kce single core - 1Gbit ports and L2 features * RTL839x - 700MHz 34Kc single core - 1Gbit ports and L2 features These switches, depending on the exact part number, will have anywhere between 8 and 52 ports. The MIPS core is wired to a switch cpu port which has a tagging feature allowing us to make use of the DSA subsystem. The SoCs are somewhat basic in certain areas, getting better with more advanced features on newer series. The switch functionality is MMIO-mapped via a large MFD region. The SoCs have the following peripherals * ethernet * switch * uart - ns16550a * spi-flash interface * gpio * wdt * led The code was derived from various vendor SDKs based on Linux v2.6 kernels. This patchset allows us to boot RTL838x/RTL839x units with basic support. Most of the other drivers are already written and functional, and work to get them upstream is already in progress. Signed-off-by: Birger Koblitz <mail@birger-koblitz.de> Signed-off-by: Bert Vermeulen <bert@biot.com> Signed-off-by: John Crispin <john@phrozen.org> Signed-off-by: Sander Vanheule <sander@svanheule.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> 
The RTL838x/839x family of SoCs are Realtek switches with an embedded
MIPS core.

* RTL838x - 500MHz 4kce single core - 1Gbit ports and L2 features
* RTL839x - 700MHz 34Kc single core - 1Gbit ports and L2 features

These switches, depending on the exact part number, will have anywhere
between 8 and 52 ports. The MIPS core is wired to a switch cpu port which
has a tagging feature allowing us to make use of the DSA subsystem.
The SoCs are somewhat basic in certain areas, getting better with more
advanced features on newer series.

The switch functionality is MMIO-mapped via a large MFD region.

The SoCs have the following peripherals
* ethernet
* switch
* uart - ns16550a
* spi-flash interface
* gpio
* wdt
* led

The code was derived from various vendor SDKs based on Linux v2.6
kernels.

This patchset allows us to boot RTL838x/RTL839x units with basic support.
Most of the other drivers are already written and functional, and work to
get them upstream is already in progress.

Signed-off-by: Birger Koblitz <mail@birger-koblitz.de>
Signed-off-by: Bert Vermeulen <bert@biot.com>
Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>