linux.git/arch/mips/boot/dts/mscc/Makefile, branch vsnprintf

MIPS: mscc: Add serval support

2020-11-12T22:35:15+00:00

Add a device trees and FIT image support for the Microsemi Serval SoC
which belongs to same family of the Ocelot SoC.

It is based on the work of Lars Povlsen .

Signed-off-by: Gregory CLEMENT 
Acked-by: Alexandre Belloni 
Signed-off-by: Thomas Bogendoerfer

MIPS: mscc: Add jaguar2 support

2020-11-12T22:34:25+00:00

Add a device trees and FIT image support for the Microsemi Jaguar2 SoC
which belongs to same family of the Ocelot SoC.

It is based on the work of Lars Povlsen .

Signed-off-by: Gregory CLEMENT 
Acked-by: Alexandre Belloni 
Signed-off-by: Thomas Bogendoerfer

MIPS: mscc: Add luton PC0B91 device tree

2020-11-12T22:33:42+00:00

Add a device tree for the Microsemi Luton PCB091 evaluation board.

It is based on the work of Lars Povlsen .

Signed-off-by: Gregory CLEMENT 
Acked-by: Alexandre Belloni 
Signed-off-by: Thomas Bogendoerfer

MIPS: mscc: Prepare configuration to handle more SoCs

2020-11-12T22:31:47+00:00

Ocelot belongs to a family of SoC named the VCore III. In order to add
these new Soc, use the new symbol SOC_VCOREIII instead of a one
dedicated to Ocelot.

In order to avoid regression on driver building, the MSCC_OCELOT
configuration symbol is kept until the driver will be converted.

Signed-off-by: Gregory CLEMENT 
Acked-by: Alexandre Belloni 
Signed-off-by: Thomas Bogendoerfer

treewide: Add SPDX license identifier - Makefile/Kconfig

2019-05-21T08:50:46+00:00

Add SPDX license identifiers to all Make/Kconfig files which:

 - Have no license information of any form

These files fall under the project license, GPL v2 only. The resulting SPDX
license identifier is:

  GPL-2.0-only

Signed-off-by: Thomas Gleixner 
Signed-off-by: Greg Kroah-Hartman

MIPS: mscc: add DT for Ocelot PCB120

2018-10-09T17:37:27+00:00

The Ocelot PCB120 evaluation board is different from the PCB123 in that
it has 4 external VSC8584 (or VSC8574) PHYs.

It uses the SoC's second MDIO bus for external PHYs which have a
reversed address on the bus (i.e. PHY4 is on address 3, PHY5 is on
address 2, PHY6 on 1 and PHY7 on 0).

Here is how the PHYs are connected to the switch ports:
port 0: phy0 (internal)
port 1: phy1 (internal)
port 2: phy2 (internal)
port 3: phy3 (internal)
port 4: phy7
port 5: phy4
port 6: phy6
port 9: phy5

Reviewed-by: Alexandre Belloni 
Signed-off-by: Quentin Schulz 
Signed-off-by: Paul Burton 
Patchwork: https://patchwork.linux-mips.org/patch/20869/
Cc: ralf@linux-mips.org
Cc: jhogan@kernel.org
Cc: robh+dt@kernel.org
Cc: mark.rutland@arm.com
Cc: davem@davemloft.net
Cc: andrew@lunn.ch
Cc: f.fainelli@gmail.com
Cc: allan.nielsen@microchip.com
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: netdev@vger.kernel.org
Cc: thomas.petazzoni@bootlin.com
Cc: antoine.tenart@bootlin.com

mips: mscc: build FIT image for Ocelot

2018-07-25T00:42:19+00:00

Ocelot now has a u-boot port, allow building FIT images instead of relying
on the legacy detection and builtin DTB.

Signed-off-by: Alexandre Belloni 
Reviewed-by: James Hogan 
Signed-off-by: Paul Burton 
Patchwork: https://patchwork.linux-mips.org/patch/19632/
Cc: Ralf Baechle 
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org

MIPS: dts: Avoid unneeded built-in.a in DTS dirs

2018-04-23T15:38:53+00:00

arch/mips/boot/dts/Makefile collects objects from sub-directories into
built-in.a only when CONFIG_BUILTIN_DTB is enabled. Reflect it also to
the sub-directory Makefiles. This suppresses unneeded built-in.a
creation in arch/mips/boot/dts/*/ directories.

While I am here, I replaced $(patsubst %.dtb, %.dtb.o, $(dtb-y)) with
$(addsuffix .o, $(dtb-y)) to simplify the code a little bit.

Signed-off-by: Masahiro Yamada 
Cc: Ralf Baechle 
Cc: Paul Cercueil 
Cc: Mathieu Malaterre 
Cc: Alexandre Belloni 
Cc: Mark Rutland 
Cc: Rob Herring 
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/19099/
Signed-off-by: James Hogan

MIPS: mscc: Add ocelot PCB123 device tree

2018-03-21T23:33:00+00:00

Add a device tree for the Microsemi Ocelot PCB123 evaluation board.

Signed-off-by: Alexandre Belloni 
Cc: Ralf Baechle 
Cc: Rob Herring 
Cc: Allan Nielsen 
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/18856/
Signed-off-by: James Hogan

MIPS: mscc: Add ocelot dtsi

2018-03-21T23:32:38+00:00

Add a device tree include file for the Microsemi Ocelot SoC.

Signed-off-by: Alexandre Belloni 
Cc: Ralf Baechle 
Cc: Rob Herring 
Cc: Allan Nielsen 
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/18855/
Signed-off-by: James Hogan