linux.git/arch/mips/boot/dts/brcm, branch vsnprintf Linux kernel source tree mips: bmips: bcm6358/6368: define required brcm,bmips-cbr-reg 2024-10-30T22:45:53+00:00 Christian Marangi ansuelsmth@gmail.com 2024-10-01T15:23:59+00:00 7c43938f6581d08bb7a79286b996a32c0945bc49 For the bcm6358/6368 SoC the brcm,bmips-cbr-reg due to bootloader misconfiguration or HW bug from running the system from TP1. A workaround is now present to handle broken system that suffer from this bug hence add the now required property. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202409251520.pE12GzHd-lkp@intel.com/ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> 
For the bcm6358/6368 SoC the brcm,bmips-cbr-reg due to bootloader
misconfiguration or HW bug from running the system from TP1.

A workaround is now present to handle broken system that suffer from
this bug hence add the now required property.

Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202409251520.pE12GzHd-lkp@intel.com/
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
MIPS: dts: bcm63268: Add missing properties to the TWD node 2022-12-21T09:46:10+00:00 Florian Fainelli f.fainelli@gmail.com 2022-12-20T19:09:46+00:00 24b333a866a10d4be47b9968b9c05a3e9f326ff5 We currently have a DTC warning with the current DTS due to the lack of a suitable #address-cells and #size-cells property: DTC arch/mips/boot/dts/brcm/bcm63268-comtrend-vr-3032u.dtb arch/mips/boot/dts/brcm/bcm63268.dtsi:115.5-22: Warning (reg_format): /ubus/timer-mfd@10000080/timer@0:reg: property has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1) arch/mips/boot/dts/brcm/bcm63268.dtsi:120.5-22: Warning (reg_format): /ubus/timer-mfd@10000080/watchdog@1c:reg: property has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1) arch/mips/boot/dts/brcm/bcm63268.dtsi:111.4-35: Warning (ranges_format): /ubus/timer-mfd@10000080:ranges: "ranges" property has invalid length (12 bytes) (parent #address-cells == 1, child #address-cells == 2, #size-cells == 1) Fixes: d3db4b96ab7f ("mips: dts: bcm63268: add TWD block timer") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> 
We currently have a DTC warning with the current DTS due to the lack of
a suitable #address-cells and #size-cells property:

  DTC     arch/mips/boot/dts/brcm/bcm63268-comtrend-vr-3032u.dtb
arch/mips/boot/dts/brcm/bcm63268.dtsi:115.5-22: Warning (reg_format): /ubus/timer-mfd@10000080/timer@0:reg: property has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1)
arch/mips/boot/dts/brcm/bcm63268.dtsi:120.5-22: Warning (reg_format): /ubus/timer-mfd@10000080/watchdog@1c:reg: property has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1)
arch/mips/boot/dts/brcm/bcm63268.dtsi:111.4-35: Warning (ranges_format): /ubus/timer-mfd@10000080:ranges: "ranges" property has invalid length (12 bytes) (parent #address-cells == 1, child #address-cells == 2, #size-cells == 1)

Fixes: d3db4b96ab7f ("mips: dts: bcm63268: add TWD block timer")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
mips: dts: brcm: bcm7435: add "interrupt-names" for NAND controller 2022-11-21T17:00:10+00:00 Rafał Miłecki rafal@milecki.pl 2022-11-08T08:50:32+00:00 f98be3b3216deb69967fae282f55c6597aa501cc Second interrupt can be DMA or EDU one. Specify it explicitly using interrupt-names property. This matches documented binding. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> 
Second interrupt can be DMA or EDU one. Specify it explicitly using
interrupt-names property. This matches documented binding.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
mips: dts: bcm63268: add TWD block timer 2022-11-21T16:59:48+00:00 Rafał Miłecki rafal@milecki.pl 2022-11-13T09:09:04+00:00 d3db4b96ab7f212733ee17d246b13075c703ab3f BCM63268 TWD contains block with 3 timers. Add binding for it. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> 
BCM63268 TWD contains block with 3 timers. Add binding for it.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
mips: bmips: bcm63268: add TWD block binding 2022-09-19T14:33:43+00:00 Rafał Miłecki rafal@milecki.pl 2022-09-14T09:10:45+00:00 b971612cc193b524b554fe53821f4dbb2a774c01 TWD is an MFD block that contains timers, watchdog & some clocks / reset controller. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> 
TWD is an MFD block that contains timers, watchdog & some clocks / reset
controller.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
MIPS: dts: align SPI NOR node name with dtschema 2022-04-26T13:07:44+00:00 Krzysztof Kozlowski krzysztof.kozlowski@linaro.org 2022-04-07T14:33:28+00:00 27498967d65c6a7c5fec5f2e33be5d8e84a775fd The node names should be generic and SPI NOR dtschema expects "flash". Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Arınç ÜNAL <arinc.unal@arinc9.com> Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> 
The node names should be generic and SPI NOR dtschema expects "flash".

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
MIPS: bmips: Add support PCIe controller device nodes 2022-01-11T10:55:41+00:00 Jim Quinlan jim2101024@gmail.com 2021-12-09T20:47:23+00:00 6fffb01e3b78ba3a38baf49c1dc7eeb5edfd5818 For Broadcom STB PCIe HW. The 7425 and 7435 are MIPs-based SOCs. Not much difference between the two for the DT properties except that they have slightly different PCIe interrupt assignments. Signed-off-by: Jim Quinlan <jim2101024@gmail.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> 
For Broadcom STB PCIe HW. The 7425 and 7435 are MIPs-based SOCs.  Not much
difference between the two for the DT properties except that they have
slightly different PCIe interrupt assignments.

Signed-off-by: Jim Quinlan <jim2101024@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
mips: bmips: bcm63268: populate device tree nodes 2021-04-06T12:31:55+00:00 Álvaro Fernández Rojas noltari@gmail.com 2021-03-14T16:43:51+00:00 666c1fc90cd82184624d4cc5d124c66025f89a47 - Rename periph_clk to periph_osc. - Rename clkctl to periph_clk. - Move syscon-reboot to subnode. - Add hsspi-osc clock. - Add watchdog. - Add HS SPI controller - Add NAND controller. - Add USBH PHY. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> 
- Rename periph_clk to periph_osc.
- Rename clkctl to periph_clk.
- Move syscon-reboot to subnode.
- Add hsspi-osc clock.
- Add watchdog.
- Add HS SPI controller
- Add NAND controller.
- Add USBH PHY.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
mips: bmips: bcm6368: populate device tree nodes 2021-04-06T12:31:55+00:00 Álvaro Fernández Rojas noltari@gmail.com 2021-03-14T16:43:50+00:00 7d9ade0f52a69a77d75070888e67ea3ec40581dc - Rename periph_clk to periph_osc. - Rename clkctl to periph_clk. - Move syscon-reboot to subnode. - Add watchdog controller. - Add SPI controller. - Add NAND controller. - Add USBH PHY controller. - Add RNG controller. - Add cfi-flash controller. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> 
- Rename periph_clk to periph_osc.
- Rename clkctl to periph_clk.
- Move syscon-reboot to subnode.
- Add watchdog controller.
- Add SPI controller.
- Add NAND controller.
- Add USBH PHY controller.
- Add RNG controller.
- Add cfi-flash controller.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
mips: bmips: bcm6362: populate device tree nodes 2021-04-06T12:31:55+00:00 Álvaro Fernández Rojas noltari@gmail.com 2021-03-14T16:43:49+00:00 277bb6e2273dce5fbe245fd6020e982931445928 - Rename periph_clk to periph_osc. - Rename clkctl to periph_clk. - Move syscon-reboot to subnode. - Add hsspi-osc clock. - Add watchdog. - Add SPI controller. - Add HS SPI controller. - Add NAND controller. - Add USBH PHY. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> 
- Rename periph_clk to periph_osc.
- Rename clkctl to periph_clk.
- Move syscon-reboot to subnode.
- Add hsspi-osc clock.
- Add watchdog.
- Add SPI controller.
- Add HS SPI controller.
- Add NAND controller.
- Add USBH PHY.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>