linux.git/arch/mips/bcm63xx, branch v3.12

MIPS: Cleanup CP0 PRId and CP1 FPIR register access masks

2013-09-18T18:25:19+00:00

Replace hardcoded CP0 PRId and CP1 FPIR register access masks throughout.
The change does not touch places that use shifted or partial masks.

Signed-off-by: Maciej W. Rozycki 
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5838/
Signed-off-by: Ralf Baechle

MIPS: BCM63XX: export PSI size from nvram

2013-08-05T17:58:55+00:00

Signed-off-by: Jonas Gorski 
Acked-by: Florian Fainelli 
Signed-off-by: Artem Bityutskiy 
Signed-off-by: David Woodhouse

Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus

2013-07-13T21:52:21+00:00

Pull MIPS updates from Ralf Baechle:
 "MIPS updates:

   - All the things that didn't make 3.10.
   - Removes the Windriver PPMC platform.  Nobody will miss it.
   - Remove a workaround from kernel/irq/irqdomain.c which was there
     exclusivly for MIPS.  Patch by Grant Likely.
   - More small improvments for the SEAD 3 platform
   - Improvments on the BMIPS / SMP support for the BCM63xx series.
   - Various cleanups of dead leftovers.
   - Platform support for the Cavium Octeon-based EdgeRouter Lite.

  Two large KVM patchsets didn't make it for this pull request because
  their respective authors are vacationing"

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (124 commits)
  MIPS: Kconfig: Add missing MODULES dependency to VPE_LOADER
  MIPS: BCM63xx: CLK: Add dummy clk_{set,round}_rate() functions
  MIPS: SEAD3: Disable L2 cache on SEAD-3.
  MIPS: BCM63xx: Enable second core SMP on BCM6328 if available
  MIPS: BCM63xx: Add SMP support to prom.c
  MIPS: define write{b,w,l,q}_relaxed
  MIPS: Expose missing pci_io{map,unmap} declarations
  MIPS: Malta: Update GCMP detection.
  Revert "MIPS: make CAC_ADDR and UNCAC_ADDR account for PHYS_OFFSET"
  MIPS: APSP: Remove 
  SSB: Kconfig: Amend SSB_EMBEDDED dependencies
  MIPS: microMIPS: Fix improper definition of ISA exception bit.
  MIPS: Don't try to decode microMIPS branch instructions where they cannot exist.
  MIPS: Declare emulate_load_store_microMIPS as a static function.
  MIPS: Fix typos and cleanup comment
  MIPS: Cleanup indentation and whitespace
  MIPS: BMIPS: support booting from physical CPU other than 0
  MIPS: Only set cpu_has_mmips if SYS_SUPPORTS_MICROMIPS
  MIPS: GIC: Fix gic_set_affinity infinite loop
  MIPS: Don't save/restore OCTEON wide multiplier state on syscalls.
  ...

Merge branch '3.10-fixes' into mips-for-linux-next

2013-07-12T16:11:43+00:00

This that should have been fixed but weren't, way to much, intrusive
and late.

MIPS: BCM63xx: CLK: Add dummy clk_{set,round}_rate() functions

2013-07-02T13:59:11+00:00

Several drivers use the clk_{set,round}_rate() functions
that need to be defined in the platform's clock code.
The Broadcom BCM63xx platform hardcodes the clock rate so
we create new clk_{set,round}_rate() functions
which just return 0 like those in include/linux/clk.h
for the common clock framework do.

Also fixes the following build problem on a randconfig:
drivers/built-in.o: In function `nop_usb_xceiv_probe':
phy-nop.c:(.text+0x3ec26c): undefined reference to `clk_set_rate'

Signed-off-by: Markos Chandras 
Acked-by: Steven J. Hill 
Acked-by: Florian Fainelli 
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5580/
Signed-off-by: Ralf Baechle

MIPS: BCM63xx: Enable second core SMP on BCM6328 if available

2013-07-01T13:10:59+00:00

BCM6328 has a OTP which tells us if the second core is available.

Signed-off-by: Jonas Gorski 
Cc: linux-mips@linux-mips.org
Cc: John Crispin 
Cc: Maxime Bizon 
Cc: Florian Fainelli 
Cc: Kevin Cernekee 
Patchwork: https://patchwork.linux-mips.org/patch/5490/
Signed-off-by: Ralf Baechle

MIPS: BCM63xx: Add SMP support to prom.c

2013-07-01T13:10:59+00:00

This involves two changes to the BSP code:

1) register_smp_ops() for BMIPS SMP

2) The CPU1 boot vector on some of the BCM63xx platforms conflicts with
the special interrupt vector (IV).  Move it to 0x8000_0380 at boot time,
to resolve the conflict.

Signed-off-by: Kevin Cernekee 
[jogo@openwrt.org: moved SMP ops registration into ifdef guard,
 changed ifdef guards to if (IS_ENABLED())]
Signed-off-by: Jonas Gorski 
Cc: linux-mips@linux-mips.org
Cc: John Crispin 
Cc: Maxime Bizon 
Cc: Florian Fainelli 
Patchwork: https://patchwork.linux-mips.org/patch/5489/
Signed-off-by: Ralf Baechle

MIPS: BCM63XX: add support for the Netgear CVG834G

2013-07-01T13:10:54+00:00

Add support for the Netgear CVG834G and enable the two UARTs, Ethernet
on the first MAC, PCI and the two leds.

Signed-off-by: Florian Fainelli 
Cc: linux-mips@linux-mips.org
Cc: cernekee@gmail.com
Cc: jogo@openwrt.org
Cc: Florian Fainelli 
Patchwork: https://patchwork.linux-mips.org/patch/5502/
Signed-off-by: Ralf Baechle

MIPS: BCM63XX: let board specify an external GPIO to reset PHY

2013-07-01T13:10:54+00:00

Some boards may need to reset their external PHY or switch they are
attached to, add a hook for doing this along with providing custom
linux/gpio.h flags for doing this.

Signed-off-by: Florian Fainelli 
Cc: linux-mips@linux-mips.org
Cc: cernekee@gmail.com
Cc: jogo@openwrt.org
Cc: Florian Fainelli 
Patchwork: https://patchwork.linux-mips.org/patch/5501/
Signed-off-by: Ralf Baechle

MIPS: BCM63XX: provide a MAC address for BCM3368 chips

2013-07-01T13:10:54+00:00

The BCM3368 SoC uses a NVRAM format which is not compatible with the one
used by CFE, provide a default MAC address which is suitable for use and
which is the default one also being used by the bootloader on these
chips.

Signed-off-by: Florian Fainelli 
Cc: linux-mips@linux-mips.org
Cc: cernekee@gmail.com
Cc: jogo@openwrt.org
Patchwork: https://patchwork.linux-mips.org/patch/5498/
Signed-off-by: Ralf Baechle