linux.git/arch/blackfin/kernel/vmlinux.lds.S, branch v4.13

debug: Fix __bug_table[] in arch linker scripts

2017-04-03T08:22:40+00:00

The kbuild test robot reported this build failure on a number
of architectures:

 >         make.cross ARCH=arm
 >    lib/lib.a(bug.o): In function `find_bug':
 > >> lib/bug.c:135: undefined reference to `__start___bug_table'
 > >> lib/bug.c:135: undefined reference to `__stop___bug_table'

Caused by:

  19d436268dde ("debug: Add _ONCE() logic to report_bug()")

Which moved the BUG_TABLE from RO_DATA_SECTION() to RW_DATA_SECTION(),
but a number of architectures don't use RW_DATA_SECTION(), so they
ended up with no __bug_table[] ...

Ideally all those would use RW_DATA_SECTION() in their linker scripts,
but that's for another day.

Signed-off-by: Peter Zijlstra 
Cc: Linus Torvalds 
Cc: Thomas Gleixner 
Cc: kbuild test robot 
Cc: kbuild-all@01.org
Cc: tipbuild@zytor.com
Link: http://lkml.kernel.org/r/20170330154927.o6qmgfp4bdhrajbm@hirez.programming.kicks-ass.net
Signed-off-by: Ingo Molnar

nmi_backtrace: generate one-line reports for idle cpus

2016-10-08T01:46:30+00:00

When doing an nmi backtrace of many cores, most of which are idle, the
output is a little overwhelming and very uninformative.  Suppress
messages for cpus that are idling when they are interrupted and just
emit one line, "NMI backtrace for N skipped: idling at pc 0xNNN".

We do this by grouping all the cpuidle code together into a new
.cpuidle.text section, and then checking the address of the interrupted
PC to see if it lies within that section.

This commit suitably tags x86 and tile idle routines, and only adds in
the minimal framework for other architectures.

Link: http://lkml.kernel.org/r/1472487169-14923-5-git-send-email-cmetcalf@mellanox.com
Signed-off-by: Chris Metcalf 
Acked-by: Peter Zijlstra (Intel) 
Tested-by: Peter Zijlstra (Intel) 
Tested-by: Daniel Thompson  [arm]
Tested-by: Petr Mladek 
Cc: Aaron Tomlin 
Cc: Peter Zijlstra (Intel) 
Cc: "Rafael J. Wysocki" 
Cc: Russell King 
Cc: Thomas Gleixner 
Cc: Ingo Molnar 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds

arch, ftrace: for KASAN put hard/soft IRQ entries into separate sections

2016-03-25T23:37:42+00:00

KASAN needs to know whether the allocation happens in an IRQ handler.
This lets us strip everything below the IRQ entry point to reduce the
number of unique stack traces needed to be stored.

Move the definition of __irq_entry to  so that the
users don't need to pull in .  Also introduce the
__softirq_entry macro which is similar to __irq_entry, but puts the
corresponding functions to the .softirqentry.text section.

Signed-off-by: Alexander Potapenko 
Acked-by: Steven Rostedt 
Cc: Christoph Lameter 
Cc: Pekka Enberg 
Cc: David Rientjes 
Cc: Joonsoo Kim 
Cc: Andrey Konovalov 
Cc: Dmitry Vyukov 
Cc: Andrey Ryabinin 
Cc: Konstantin Serebryany 
Cc: Dmitry Chernenkov 
Signed-off-by: Andrew Morton 
Signed-off-by: Linus Torvalds

blackfin: vmlinux.lds.S: reserve 32 bytes space at the end of data section for XIP kernel

2014-07-26T00:32:50+00:00

to collect some undefined section to the end of the data section and avoid section overlap

Signed-off-by: Steven Miao

Blackfin: make sure percpu section is aligned in XIP builds

2011-07-23T05:18:22+00:00

The alignment is normally handled by PERCPU(), but we need to do it
ourselves in the XIP build due to the custom layout.

Signed-off-by: Steven Miao 
Signed-off-by: Mike Frysinger

Blackfin: use new common PERCPU_INPUT define

2011-05-25T12:24:15+00:00

The Blackfin percpu input sections are outdated, so rather than update
them, drop them completely and use the new common define.

Signed-off-by: Mike Frysinger

percpu: Always align percpu output section to PAGE_SIZE

2011-03-24T17:50:09+00:00

Percpu allocator honors alignment request upto PAGE_SIZE and both the
percpu addresses in the percpu address space and the translated kernel
addresses should be aligned accordingly.  The calculation of the
former depends on the alignment of percpu output section in the kernel
image.

The linker script macros PERCPU_VADDR() and PERCPU() are used to
define this output section and the latter takes @align parameter.
Several architectures are using @align smaller than PAGE_SIZE breaking
percpu memory alignment.

This patch removes @align parameter from PERCPU(), renames it to
PERCPU_SECTION() and makes it always align to PAGE_SIZE.  While at it,
add PCPU_SETUP_BUG_ON() checks such that alignment problems are
reliably detected and remove percpu alignment comment recently added
in workqueue.c as the condition would trigger BUG way before reaching
there.

For um, this patch raises the alignment of percpu area.  As the area
is in .init, there shouldn't be any noticeable difference.

This problem was discovered by David Howells while debugging boot
failure on mn10300.

Signed-off-by: Tejun Heo 
Acked-by: Mike Frysinger 
Cc: uclinux-dist-devel@blackfin.uclinux.org
Cc: David Howells 
Cc: Jeff Dike 
Cc: user-mode-linux-devel@lists.sourceforge.net

Blackfin: SMP: work around anomaly 05000491

2011-03-18T08:01:04+00:00

In order to safely work around anomaly 05000491, we have to execute IFLUSH
from L1 instruction sram.  The trouble with multi-core systems is that all
L1 sram is visible only to the active core.  So we can't just place the
functions into L1 and call it directly.  We need to setup a jump table and
place the entry point in external memory.  This will call the right func
based on the active core.

In the process, convert from the manual relocation of a small bit of code
into Core B's L1 to the more general framework we already have in place
for loading arbitrary pieces of code into L1.

Signed-off-by: Sonic Zhang 
Signed-off-by: Mike Frysinger

Blackfin: SMP: PERCPU section should be PAGE aligned

2011-03-18T08:01:01+00:00

Common code checks the alignment of some of the variables and calls BUG()
if they aren't page aligned.

Signed-off-by: steven miao 
Signed-off-by: Mike Frysinger

percpu: align percpu readmostly subsection to cacheline

2011-01-25T13:26:50+00:00

Currently percpu readmostly subsection may share cachelines with other
percpu subsections which may result in unnecessary cacheline bounce
and performance degradation.

This patch adds @cacheline parameter to PERCPU() and PERCPU_VADDR()
linker macros, makes each arch linker scripts specify its cacheline
size and use it to align percpu subsections.

This is based on Shaohua's x86 only patch.

Signed-off-by: Tejun Heo 
Cc: Shaohua Li