linux.git/arch/arm, branch v2.6.17 Linux kernel source tree Merge master.kernel.org:/home/rmk/linux-2.6-arm 2006-06-12T20:45:41+00:00 Linus Torvalds torvalds@g5.osdl.org 2006-06-12T20:45:41+00:00 37b0d1dedcedf555e2940bc7702c11e2b572299f * master.kernel.org:/home/rmk/linux-2.6-arm: [ARM] Fix Integrator and Versatile interrupt initialisation [ARM] 3546/1: PATCH: subtle lost interrupts bug on i.MX [ARM] 3547/1: PXA-OHCI: Allow platforms to specify a power budget [ARM] Fix Neponset IRQ handling 
* master.kernel.org:/home/rmk/linux-2.6-arm:
  [ARM] Fix Integrator and Versatile interrupt initialisation
  [ARM] 3546/1: PATCH: subtle lost interrupts bug on i.MX
  [ARM] 3547/1: PXA-OHCI: Allow platforms to specify a power budget
  [ARM] Fix Neponset IRQ handling
[ARM] Fix Integrator and Versatile interrupt initialisation 2006-06-10T11:42:12+00:00 Russell King rmk@dyn-67.arm.linux.org.uk 2006-06-10T11:42:12+00:00 56f1319e877a969b814b3805c77ea9c31d849f54 Both Integrator and Versatile were using set_irq_handler() and enable_irq(), and working around the initialisation of the chained interrupt, instead of the more correct set_irq_chained_handler() function. Fix Integrator and Versatile to use the right function, and remove these work-arounds. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 
Both Integrator and Versatile were using set_irq_handler() and
enable_irq(), and working around the initialisation of the
chained interrupt, instead of the more correct
set_irq_chained_handler() function.  Fix Integrator and
Versatile to use the right function, and remove these work-arounds.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
[PATCH] ep93xx build fix 2006-06-08T22:12:21+00:00 Lennert Buytenhek buytenh@wantstofly.org 2006-06-08T07:43:40+00:00 fd0a0ac1c5393b226640a30bae753983068136b3 From: Lennert Buytenhek <buytenh@wantstofly.org> The recent renaming of m48t86's ->readb() and ->writeb() platform driver methods (2d7b20c1884777e66009be1a533641c19c4705f6) to ->readbyte() and ->writebyte() to fix the ia64 build broke the build of the cirrus ep93xx ARM platform. This patch fixes it up. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org> 
From: Lennert Buytenhek <buytenh@wantstofly.org>

The recent renaming of m48t86's ->readb() and ->writeb() platform driver
methods (2d7b20c1884777e66009be1a533641c19c4705f6) to ->readbyte() and
->writebyte() to fix the ia64 build broke the build of the cirrus ep93xx
ARM platform.  This patch fixes it up.

Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Cc: Alessandro Zummo <a.zummo@towertech.it>
Cc: Russell King <rmk@arm.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
[ARM] 3546/1: PATCH: subtle lost interrupts bug on i.MX 2006-06-08T21:46:48+00:00 Matt Reimer mreimer@vpop.net 2006-06-08T21:46:48+00:00 e2f04e18941dbd3826901540a0be03f1728f8822 Patch from Matt Reimer There is a subtle bug in the GPIO interrupt status register handling in arch/arm/mach-imx/irq.c:imx_gpio_ack_irq(). The documentation states that a 1 should be written to the relevant bit to acknowledge a GPIO interrupt, but that is not what the code does. The problem is that the |= writes back 1s for all the *other* interrupts represented in the register, so interrupts could get lost. For example, if interrupts are pending for GPIO B10 and B12, ISR_B would have the value 0x00001400. Then when the interrupt code handles GPIO B10, it eventually calls imx_gpio_ack_irq(IRQ_GPIOB(10)), which effectively does this: ISR_B |= 1 << 10; with the result that (0x00001400 | 0x00000400) is written, clearing the interrupt status bits for *both* GPIO B10 and B12. The fix is to write 1s only for the interrupts we want to clear. The same problem seems to be occurring in the DMA code; this patch does not address those issues. Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Matt Reimer <mreimer@vpop.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 
Patch from Matt Reimer

There is a subtle bug in the GPIO interrupt status register
handling in arch/arm/mach-imx/irq.c:imx_gpio_ack_irq(). The
documentation states that a 1 should be written to the relevant bit to
acknowledge a GPIO interrupt, but that is not what the code does.

The problem is that the |= writes back 1s for all the *other*
interrupts represented in the register, so interrupts could get lost.
For example, if interrupts are pending for GPIO B10 and B12, ISR_B
would have the value 0x00001400. Then when the interrupt code handles
GPIO B10, it eventually calls imx_gpio_ack_irq(IRQ_GPIOB(10)), which
effectively does this:

ISR_B |= 1 << 10;

with the result that (0x00001400 | 0x00000400) is written, clearing
the interrupt status bits for *both* GPIO B10 and B12.

The fix is to write 1s only for the interrupts we want to clear.

The same problem seems to be occurring in the DMA code; this patch
does not address those issues.

Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Matt Reimer <mreimer@vpop.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
[ARM] 3547/1: PXA-OHCI: Allow platforms to specify a power budget 2006-06-08T21:44:07+00:00 Richard Purdie rpurdie@rpsys.net 2006-06-08T21:44:07+00:00 0c27c5d5b93339df4def7ced77ea5be26df4d84b Patch from Richard Purdie Add a power budget variable to the PXA OHCI platform data and add a default value for the spitz platform(s) which prevents known failures with certain USB devices. Signed-off-by: Richard Purdie <rpurdie@rpsys.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 
Patch from Richard Purdie

Add a power budget variable to the PXA OHCI platform data and add a
default value for the spitz platform(s) which prevents known failures
with certain USB devices.

Signed-off-by: Richard Purdie <rpurdie@rpsys.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
[ARM] Fix Neponset IRQ handling 2006-06-08T16:59:31+00:00 Russell King rmk@dyn-67.arm.linux.org.uk 2006-06-08T16:59:31+00:00 d782f33df706f1b8a4496b41fd7d339c6e23aa59 While testing the genirq code on ARM, a condition was found whereby the Neponset IRQ handler was being re-entered, causing the system to deadlock. Under the ARM IRQ code, this would not have been a visible problem because the "simple" IRQ handling had no re-entrancy protection. Resolve this by acknowledging the parent interrupt after we mask it when we are going to handle one of our "special" level-based sources (from ethernet or USAR chip.) Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 
While testing the genirq code on ARM, a condition was found whereby
the Neponset IRQ handler was being re-entered, causing the system
to deadlock.

Under the ARM IRQ code, this would not have been a visible problem
because the "simple" IRQ handling had no re-entrancy protection.

Resolve this by acknowledging the parent interrupt after we mask it
when we are going to handle one of our "special" level-based sources
(from ethernet or USAR chip.)

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
[ARM] 3543/1: [Fwd: PXA270 bootparams address not set] 2006-06-05T18:47:17+00:00 Steve Yang steve.yang@windriver.com 2006-06-05T18:47:17+00:00 a7d14f875f03cb78992da8387be81a4c9197f101 Patch from Steve Yang MACHINE_START struct doesn't have any bootargs location for the mainstone. Result is no kernel command args get passed; no serial driver is selected for console and results in a silent boot failure. Signed-off-by: Steve Yang <steve.yang@windriver.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 
Patch from Steve Yang

MACHINE_START struct doesn't have any bootargs location for the
mainstone. Result is no kernel command args get passed; no serial driver
is selected for console and results in a silent boot failure.

Signed-off-by: Steve Yang <steve.yang@windriver.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
[ARM] Trivial typo fixes 2006-06-04T20:22:11+00:00 Egry Gabor gaboregry@t-online.hu 2006-06-04T20:22:11+00:00 c41045a43a08f898ef5490036f761c87a43dcddc Trivial typo fixes in Kconfig files (ARM). Signed-off-by: Egry Gabor <gaboregry@t-online.hu> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 
Trivial typo fixes in Kconfig files (ARM).

Signed-off-by: Egry Gabor <gaboregry@t-online.hu>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
[ARM] 3540/1: ixp23xx: deal with gap in interrupt bitmasks 2006-06-02T18:51:51+00:00 Lennert Buytenhek buytenh@wantstofly.org 2006-06-02T18:51:51+00:00 ec8510f6fe57f59e42484809679af31ca7896dcf Patch from Lennert Buytenhek On the ixp23xx, the microengine thread interrupt sources are numbered 56..119, but their mask/status bits are located in bit positions 64..127 in the various registers in the interrupt controller (bit positions 56..63 are unused.) We don't deal with this, so currently, when asked to enable IRQ 64, we will enable IRQ 56 instead. The only interrupts >= 64 are the thread interrupt sources, and there are no in-tree users of those yet, so this is fortunately not a big problem, but this needs fixing anyway. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 
Patch from Lennert Buytenhek

On the ixp23xx, the microengine thread interrupt sources are numbered
56..119, but their mask/status bits are located in bit positions 64..127
in the various registers in the interrupt controller (bit positions
56..63 are unused.)

We don't deal with this, so currently, when asked to enable IRQ 64, we
will enable IRQ 56 instead.

The only interrupts >= 64 are the thread interrupt sources, and there
are no in-tree users of those yet, so this is fortunately not a big
problem, but this needs fixing anyway.

Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
[PATCH] ARM: Fix XScale PMD setting 2006-05-31T23:27:44+00:00 Deepak Saxena dsaxena@plexity.net 2006-05-31T23:14:05+00:00 5cedae9ca752a43cfb1074907d12c9f01fbebd45 The ARM Architecture Reference Manual lists bit 4 of the PMD as "implementation defined" and it must be set to zero on Intel XScale CPUs or the cache does not behave properly. Found by Mike Rapoport while debugging a flash issue on the PXA255: http://marc.10east.com/?l=linux-arm-kernel&m=114845287600782&w=1 Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Linus Torvalds <torvalds@osdl.org> 
The ARM Architecture Reference Manual lists bit 4 of the PMD as "implementation
defined" and it must be set to zero on Intel XScale CPUs or the cache does
not behave properly. Found by Mike Rapoport while debugging a flash issue
on the PXA255:

	http://marc.10east.com/?l=linux-arm-kernel&m=114845287600782&w=1

Signed-off-by: Deepak Saxena <dsaxena@plexity.net>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>