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<title>linux.git/arch/arm64/include/asm/nmi.h, branch master</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>arm64: escalate smp_send_stop() to an SDEI NMI as a last resort</title>
<updated>2026-08-02T09:21:06+00:00</updated>
<author>
<name>Kiryl Shutsemau (Meta)</name>
<email>kas@kernel.org</email>
</author>
<published>2026-06-29T15:07:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=d639f762629212db129ba76bde5526da902654a4'/>
<id>d639f762629212db129ba76bde5526da902654a4</id>
<content type='text'>
A CPU wedged with interrupts masked ignores the stop IPI, and without
pseudo-NMI there is no NMI IPI to escalate to: a reboot proceeds with
the CPU still running, and a kdump misses its registers.

Add a third rung to smp_send_stop(): once the IPI (and pseudo-NMI IPI,
if enabled) rungs have run, signal SDEI event 0 at whatever stayed
online. Firmware delivers it regardless of the target's DAIF, so it
reaches a CPU a plain IPI cannot; the target acks by going offline,
which the caller already polls for.

Fold the stop bookkeeping into one arm64_nmi_cpu_stop(regs,
die_on_crash), shared by the stop IPI handlers, panic_smp_self_stop()
and the SDEI handler, replacing the near-duplicate local_cpu_stop() and
ipi_cpu_crash_stop(). @die_on_crash is the only difference: the IPI
handlers pass true and PSCI CPU_OFF the CPU on a crash stop so a capture
kernel can reclaim it; the SDEI handler and self-stop pass false and
park. The SDEI park is required, not conservative -- its handler runs
inside an SDEI event that is never completed (completing it resumes the
wedged context), and a CPU_OFF from that unfinished-event context wedges
EL3 on some firmware (left as a follow-up). The dump is unaffected; only
re-onlining the CPU in an SMP capture kernel is lost.

Suggested-by: Douglas Anderson &lt;dianders@chromium.org&gt;
Signed-off-by: Kiryl Shutsemau (Meta) &lt;kas@kernel.org&gt;
Reviewed-by: Douglas Anderson &lt;dianders@chromium.org&gt;
Tested-by: Yin Fengwei &lt;fengwei_yin@linux.alibaba.com&gt;
Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
A CPU wedged with interrupts masked ignores the stop IPI, and without
pseudo-NMI there is no NMI IPI to escalate to: a reboot proceeds with
the CPU still running, and a kdump misses its registers.

Add a third rung to smp_send_stop(): once the IPI (and pseudo-NMI IPI,
if enabled) rungs have run, signal SDEI event 0 at whatever stayed
online. Firmware delivers it regardless of the target's DAIF, so it
reaches a CPU a plain IPI cannot; the target acks by going offline,
which the caller already polls for.

Fold the stop bookkeeping into one arm64_nmi_cpu_stop(regs,
die_on_crash), shared by the stop IPI handlers, panic_smp_self_stop()
and the SDEI handler, replacing the near-duplicate local_cpu_stop() and
ipi_cpu_crash_stop(). @die_on_crash is the only difference: the IPI
handlers pass true and PSCI CPU_OFF the CPU on a crash stop so a capture
kernel can reclaim it; the SDEI handler and self-stop pass false and
park. The SDEI park is required, not conservative -- its handler runs
inside an SDEI event that is never completed (completing it resumes the
wedged context), and a CPU_OFF from that unfinished-event context wedges
EL3 on some firmware (left as a follow-up). The dump is unaffected; only
re-onlining the CPU in an SMP capture kernel is lost.

Suggested-by: Douglas Anderson &lt;dianders@chromium.org&gt;
Signed-off-by: Kiryl Shutsemau (Meta) &lt;kas@kernel.org&gt;
Reviewed-by: Douglas Anderson &lt;dianders@chromium.org&gt;
Tested-by: Yin Fengwei &lt;fengwei_yin@linux.alibaba.com&gt;
Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drivers/firmware: add SDEI cross-CPU NMI service for arm64</title>
<updated>2026-08-02T09:21:06+00:00</updated>
<author>
<name>Kiryl Shutsemau (Meta)</name>
<email>kas@kernel.org</email>
</author>
<published>2026-06-29T15:07:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=0c2c56598cc11b4e422b739ccd0f77bcd1f216ee'/>
<id>0c2c56598cc11b4e422b739ccd0f77bcd1f216ee</id>
<content type='text'>
Deliver an NMI-like event to an interrupt-masked arm64 CPU via the
standard SDEI software-signalled event (event 0), without the pseudo-NMI
hot-path cost: register a handler for event 0 and poke a target with
sdei_event_signal(0, mpidr).

First user is arch_trigger_cpumask_backtrace() (sysrq-l, RCU stalls,
hung-task/soft-lockup dumps), which otherwise rides an IPI that can't
reach a masked CPU. Falls back to the IPI path when SDEI is absent; no
watchdog backend yet, so the stock detector is untouched.

Signed-off-by: Kiryl Shutsemau (Meta) &lt;kas@kernel.org&gt;
Reviewed-by: Douglas Anderson &lt;dianders@chromium.org&gt;
Tested-by: Yin Fengwei &lt;fengwei_yin@linux.alibaba.com&gt;
Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Deliver an NMI-like event to an interrupt-masked arm64 CPU via the
standard SDEI software-signalled event (event 0), without the pseudo-NMI
hot-path cost: register a handler for event 0 and poke a target with
sdei_event_signal(0, mpidr).

First user is arch_trigger_cpumask_backtrace() (sysrq-l, RCU stalls,
hung-task/soft-lockup dumps), which otherwise rides an IPI that can't
reach a masked CPU. Falls back to the IPI path when SDEI is absent; no
watchdog backend yet, so the stock detector is untouched.

Signed-off-by: Kiryl Shutsemau (Meta) &lt;kas@kernel.org&gt;
Reviewed-by: Douglas Anderson &lt;dianders@chromium.org&gt;
Tested-by: Yin Fengwei &lt;fengwei_yin@linux.alibaba.com&gt;
Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
</pre>
</div>
</content>
</entry>
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