linux.git/arch/arm64/boot/dts/intel, branch master

arm64: dts: intel: agilex5: Drop CPU masks from GICv3 PPI interrupts

2026-03-31T02:27:28+00:00

Unlike older GIC variants, the GICv3 DT bindings do not support
specifying a CPU mask in PPI interrupt specifiers.  Drop the masks.

Signed-off-by: Geert Uytterhoeven 
Signed-off-by: Dinh Nguyen

arm64: dts: socfpga: agilex: add emmc support

2026-01-30T15:44:46+00:00

The Agilex devkit supports a separate eMMC daughter card. The
eMMC daughter card replaces the SDMMC slot that is on the default
daughter card and thus requires a separate board dts file.

Signed-off-by: Ng Tze Yee 
Signed-off-by: Dinh Nguyen

arm64: dts: intel: agilex5: Add simple-bus node on top of dma controller node

2026-01-30T15:27:12+00:00

Move dma-controller node under simple-bus node to allow bus node specific
property able to be properly defined. This is require to fulfill Agilex5
bus limitation that is limited to 40-addressable-bit.

Update the compatible string for the DMA controller nodes in the Agilex5
device tree from the generic "snps,axi-dma-1.01a" to the platform-specific
"altr,agilex5-axi-dma". Add fallback capability to ensure driver is able
to initialize properly.

This change enables the use of platform-specific features and constraints
in the driver, such as setting a 40-bit DMA addressable mask through
dma-ranges, which is required for Agilex5. It also aligns with the updated
device tree bindings and driver support for this compatible string.

Signed-off-by: Khairul Anuar Romli 
Signed-off-by: Dinh Nguyen

arm64: dts: altera: Use lowercase hex

2026-01-30T15:27:12+00:00

The DTS code coding style expects lowercase hex for values and unit
addresses.

Signed-off-by: Krzysztof Kozlowski 
Signed-off-by: Dinh Nguyen

arm64: dts: socfpga: agilex5: Add IOMMUS property for ethernet nodes

2026-01-30T15:27:12+00:00

To enable SMMU integration, populate the iommus property to the ethernet
device-tree node.

Signed-off-by: Nazim Amirul 
Signed-off-by: Dinh Nguyen

arm64: dts: socfpga: agilex5: add support for modular board

2026-01-30T15:27:12+00:00

The Agilex5 Modular board consists of a compute module (Agilex5 SoCFPGA)
attached to a carrier board that provides PCIe and additional system
interfaces.

Signed-off-by: Niravkumar L Rabara 
Signed-off-by: Dinh Nguyen

arm64: dts: socfpga: agilex5: Add dma-coherent property

2026-01-30T15:27:12+00:00

Add the `dma-coherent` property to these device nodes to inform the
kernel and DMA subsystem that the devices support hardware-managed
cache coherence.

Changes:
 - Add `dma-coherent` to `cdns,hp-nfc`
 - Add `dma-coherent` to both `snps,axi-dma-1.01a` instances
   (dmac0, dmac1)

This aligns the Agilex5 device tree with the coherent DMA-capable
devices accordingly.

Signed-off-by: Khairul Anuar Romli 
Signed-off-by: Dinh Nguyen

arm64: dts: socfpga: agilex5: update qspi partitions for 013b board

2025-11-17T11:37:59+00:00

Update qspi flash partitions to support Remote System Update (RSU).

Signed-off-by: Niravkumar L Rabara 
Signed-off-by: Dinh Nguyen

arm64: dts: socfpga: add Agilex3 board

2025-11-14T13:00:22+00:00

Agilex3 SoCFPGA development kit is a small form factor board similar to
Agilex5 013b board. Agilex3 is derived from Agilex5 SoCFPGA, with the main
difference of CPU cores — Agilex3 has 2 cores compared to 4 in Agilex5.

Signed-off-by: Niravkumar L Rabara 
Signed-off-by: Dinh Nguyen

arm64: dts: intel: agilex5: Add Altera compatible for I3C controllers

2025-11-12T18:57:02+00:00

Add the "altr,agilex5-dw-i3c-master" compatible string to the
I3C controller nodes on the Agilex5 SoCFPGA platform.

Signed-off-by: Adrian Ng Ho Yin 
Signed-off-by: Dinh Nguyen