linux.git/arch/arm/mach-versatile, branch v3.13 Linux kernel source tree Merge branch 'versatile/fixes' into fixes 2013-09-10T00:31:04+00:00 Olof Johansson olof@lixom.net 2013-09-10T00:31:04+00:00 23c43df854b14cf49231e84c0161a4485b5613a2 From Peter Maydell: These patches fix a number of issues with the PCI controller code for mach-versatile: (1) The irq mapping matched neither hardware nor QEMU; we correct it to match the hardware, which means it will also work on recent (1.5 or later) QEMU. (2) The code was confused between the PCI I/O window (at 0x43000000) and the first PCI memory window (at 0x44000000), which meant that PCI devices using PCI PIO rather than MMIO didn't work. This is fixed (and some variables/labels are renamed to avoid further confusion in future). (3) The SMAP register offsets were all off-by-four, though by fluke this didn't actually have any ill effects. All these changes have been tested on real hardware (PB926 plus the PCI backplane), as well as on QEMU. I have confirmed that IRQs and PCI PIO and MMIO work OK. PCI bus-master DMA doesn't seem to work on h/w -- as far as I can tell the device is correctly managing to DMA to the right places in memory, but every other 32 bit word is corrupt (at least judging from rtl8139 debug dumps of the frames it's receiving). I'm not sure what's going on here, but since this is disjoint from the irq and I/O issues I don't think that applying the patches that fix those should be stalled on trying to debug DMA problems. (DMA works fine on QEMU, incidentally.) * versatile/fixes: ARM: PCI: versatile: Fix SMAP register offsets ARM: PCI: versatile: Fix PCI I/O ARM: PCI: versatile: Fix map_irq function to match hardware Signed-off-by: Olof Johansson <olof@lixom.net> 
From Peter Maydell:
These patches fix a number of issues with the PCI controller
code for mach-versatile:

(1) The irq mapping matched neither hardware nor QEMU; we correct
it to match the hardware, which means it will also work on recent
(1.5 or later) QEMU.

(2) The code was confused between the PCI I/O window (at 0x43000000)
and the first PCI memory window (at 0x44000000), which meant that
PCI devices using PCI PIO rather than MMIO didn't work. This is
fixed (and some variables/labels are renamed to avoid further
confusion in future).

(3) The SMAP register offsets were all off-by-four, though by
fluke this didn't actually have any ill effects.

All these changes have been tested on real hardware (PB926
plus the PCI backplane), as well as on QEMU. I have confirmed
that IRQs and PCI PIO and MMIO work OK.

PCI bus-master DMA doesn't seem to work on h/w -- as far as I can
tell the device is correctly managing to DMA to the right places
in memory, but every other 32 bit word is corrupt (at least judging
from rtl8139 debug dumps of the frames it's receiving). I'm not
sure what's going on here, but since this is disjoint from
the irq and I/O issues I don't think that applying the
patches that fix those should be stalled on trying to debug
DMA problems. (DMA works fine on QEMU, incidentally.)

* versatile/fixes:
  ARM: PCI: versatile: Fix SMAP register offsets
  ARM: PCI: versatile: Fix PCI I/O
  ARM: PCI: versatile: Fix map_irq function to match hardware

Signed-off-by: Olof Johansson <olof@lixom.net>
ARM: PCI: versatile: Fix SMAP register offsets 2013-09-04T21:53:33+00:00 Peter Maydell peter.maydell@linaro.org 2013-08-22T16:47:50+00:00 99f2b130370b904ca5300079243fdbcafa2c708b The SMAP register offsets in the versatile PCI controller code were all off by four. (This didn't have any observable bad effects because on this board PHYS_OFFSET is zero, and (a) writing zero to the flags register at offset 0x10 has no effect and (b) the reset value of the SMAP register is zero anyway, so failing to write SMAP2 didn't matter.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Cc: stable@vger.kernel.org Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kevin Hilman <khilman@linaro.org> 
The SMAP register offsets in the versatile PCI controller code were
all off by four.  (This didn't have any observable bad effects
because on this board PHYS_OFFSET is zero, and (a) writing zero to
the flags register at offset 0x10 has no effect and (b) the reset
value of the SMAP register is zero anyway, so failing to write SMAP2
didn't matter.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Cc: stable@vger.kernel.org
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
ARM: PCI: versatile: Fix PCI I/O 2013-09-04T21:53:26+00:00 Peter Maydell peter.maydell@linaro.org 2013-08-22T16:47:49+00:00 829f9fedee30cde2ec15e88d57ec11074db791e2 The versatile PCI controller code was confused between the PCI I/O window (at 0x43000000) and the first PCI memory window (at 0x44000000). Pass the correct base address to pci_remap_io() so that PCI I/O accesses work. Since the first PCI memory window isn't used at all (it's an odd size), rename the associated variables and labels so that it's clear that it isn't related to the I/O window. This has been tested and confirmed to fix PCI I/O accesses both on physical PB926+PCI backplane hardware and on QEMU. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Cc: stable@vger.kernel.org Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kevin Hilman <khilman@linaro.org> 
The versatile PCI controller code was confused between the
PCI I/O window (at 0x43000000) and the first PCI memory
window (at 0x44000000). Pass the correct base address to
pci_remap_io() so that PCI I/O accesses work.

Since the first PCI memory window isn't used at all (it's
an odd size), rename the associated variables and labels
so that it's clear that it isn't related to the I/O window.

This has been tested and confirmed to fix PCI I/O accesses
both on physical PB926+PCI backplane hardware and on QEMU.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Cc: stable@vger.kernel.org
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
ARM: PCI: versatile: Fix map_irq function to match hardware 2013-09-04T21:52:52+00:00 Peter Maydell peter.maydell@linaro.org 2013-08-22T16:47:48+00:00 f9b71fef12f0d6ac5c7051cfd87f7700f78c56b6 The PCI controller code for the Versatile board has never had the correct IRQ mapping for hardware. For many years it had an odd mapping ("all interrupts are int 27") which aligned with the equivalent bug in QEMU. However as of commit 1bc39ac5dab265 the mapping changed and no longer matched either hardware or QEMU, with the result that any PCI card beyond the first in QEMU would not have functioning interrupts; for example a boot with a SCSI controller would time out as follows: ------------ sym0: <895a> rev 0x0 at pci 0000:00:0d.0 irq 92 sym0: SCSI BUS has been reset. scsi0 : sym-2.2.3 [...] scsi 0:0:0:0: ABORT operation started scsi 0:0:0:0: ABORT operation timed-out. scsi 0:0:0:0: DEVICE RESET operation started scsi 0:0:0:0: DEVICE RESET operation timed-out. scsi 0:0:0:0: BUS RESET operation started scsi 0:0:0:0: BUS RESET operation timed-out. scsi 0:0:0:0: HOST RESET operation started sym0: SCSI BUS has been reset ------------ Fix the mapping so that it matches real hardware (checked against the schematics for PB926 and backplane, and tested against the hardware). This allows PCI cards using interrupts to work on hardware for the first time; this change will also work with QEMU 1.5 or later, where the equivalent bugs in the modelling of the hardware have been fixed. Although QEMU will attempt to autodetect whether the kernel is expecting the long-standing "everything is int 27" mapping or the one hardware has, for certainty we force it into "definitely behave like hardware mode"; this will avoid unexpected surprises later if we implement sparse irqs. This is harmless on hardware. Thanks to Paul Gortmaker for bisecting the problem and finding an initial solution, to Russell King for providing the correct interrupt mapping, and to Guenter Roeck for providing an initial version of this patch and prodding me into relocating the hardware and retesting everything. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Cc: stable@vger.kernel.org Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kevin Hilman <khilman@linaro.org> 
The PCI controller code for the Versatile board has never had the
correct IRQ mapping for hardware.  For many years it had an odd
mapping ("all interrupts are int 27") which aligned with the
equivalent bug in QEMU.  However as of commit 1bc39ac5dab265
the mapping changed and no longer matched either hardware or QEMU,
with the result that any PCI card beyond the first in QEMU would
not have functioning interrupts; for example a boot with a SCSI
controller would time out as follows:

 ------------
 sym0: <895a> rev 0x0 at pci 0000:00:0d.0 irq 92
 sym0: SCSI BUS has been reset.
 scsi0 : sym-2.2.3
 [...]
 scsi 0:0:0:0: ABORT operation started
 scsi 0:0:0:0: ABORT operation timed-out.
 scsi 0:0:0:0: DEVICE RESET operation started
 scsi 0:0:0:0: DEVICE RESET operation timed-out.
 scsi 0:0:0:0: BUS RESET operation started
 scsi 0:0:0:0: BUS RESET operation timed-out.
 scsi 0:0:0:0: HOST RESET operation started
 sym0: SCSI BUS has been reset
 ------------

Fix the mapping so that it matches real hardware (checked against the
schematics for PB926 and backplane, and tested against the hardware).
This allows PCI cards using interrupts to work on hardware for the
first time; this change will also work with QEMU 1.5 or later, where
the equivalent bugs in the modelling of the hardware have been fixed.

Although QEMU will attempt to autodetect whether the kernel is
expecting the long-standing "everything is int 27" mapping or the one
hardware has, for certainty we force it into "definitely behave like
hardware mode"; this will avoid unexpected surprises later if we
implement sparse irqs. This is harmless on hardware.

Thanks to Paul Gortmaker for bisecting the problem and finding an initial
solution, to Russell King for providing the correct interrupt mapping,
and to Guenter Roeck for providing an initial version of this patch
and prodding me into relocating the hardware and retesting everything.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Cc: stable@vger.kernel.org
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
ARM: debug: move PL01X debug include into arch/arm/include/debug/ 2013-08-25T16:11:06+00:00 Russell King rmk+kernel@arm.linux.org.uk 2013-07-07T11:36:46+00:00 4e218b99285485a6788339ee660cc535c7bd5017 Now that the PL01X debug include can mostly stand alone without requiring platforms to provide any macros, move it into the debug directory so it can be directly included. This allows us to get rid of a lot of debug-macros include files. The autodetect case for Versatile Express and the ux500 are left alone; these are more complicated implementations. Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Ryan Mallon <rmallon@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 
Now that the PL01X debug include can mostly stand alone without
requiring platforms to provide any macros, move it into the debug
directory so it can be directly included.  This allows us to get rid of
a lot of debug-macros include files.

The autodetect case for Versatile Express and the ux500 are left alone;
these are more complicated implementations.

Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Ryan Mallon <rmallon@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
ARM: debug: provide PL01x debug uart phys/virt address configuration options 2013-08-25T16:11:05+00:00 Russell King rmk+kernel@arm.linux.org.uk 2013-07-07T11:32:16+00:00 5c972af407419c79e1e922fb241fa0d06b4f1ffd Move the definition of the UART register addresses out of the platform specific header files into the Kconfig files. Acked-by: Ryan Mallon <rmallon@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 
Move the definition of the UART register addresses out of the platform
specific header files into the Kconfig files.

Acked-by: Ryan Mallon <rmallon@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
reboot: arm: change reboot_mode to use enum reboot_mode 2013-07-09T17:33:29+00:00 Robin Holt holt@sgi.com 2013-07-08T23:01:40+00:00 7b6d864b48d95e6ea1df7df64475b9cb9616dcf9 Preparing to move the parsing of reboot= to generic kernel code forces the change in reboot_mode handling to use the enum. [akpm@linux-foundation.org: fix arch/arm/mach-socfpga/socfpga.c] Signed-off-by: Robin Holt <holt@sgi.com> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Russ Anderson <rja@sgi.com> Cc: Robin Holt <holt@sgi.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org> 
Preparing to move the parsing of reboot= to generic kernel code forces
the change in reboot_mode handling to use the enum.

[akpm@linux-foundation.org: fix arch/arm/mach-socfpga/socfpga.c]
Signed-off-by: Robin Holt <holt@sgi.com>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Cc: Russ Anderson <rja@sgi.com>
Cc: Robin Holt <holt@sgi.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
ARM: versatile: use OF init for sp804 timer 2013-04-11T20:11:21+00:00 Rob Herring rob.herring@calxeda.com 2013-03-13T22:07:44+00:00 818270d573674188cfe731992e66455e2e183e64 Enable DT based init for the sp804 timers on versatile DT platform. Signed-off-by: Rob Herring <rob.herring@calxeda.com> 
Enable DT based init for the sp804 timers on versatile DT platform.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Merge tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc 2013-02-21T22:58:40+00:00 Linus Torvalds torvalds@linux-foundation.org 2013-02-21T22:58:40+00:00 b274776c54c320763bc12eb035c0e244f76ccb43 Pull ARM SoC cleanups from Arnd Bergmann: "A large number of cleanups, all over the platforms. This is dominated largely by the Samsung platforms (s3c, s5p, exynos) and a few of the others moving code out of arch/arm into more appropriate subsystems. The clocksource and irqchip drivers are now abstracted to the point where platforms that are already cleaned up do not need to even specify the driver they use, it can all get configured from the device tree as we do for normal device drivers. The clocksource changes basically touch every single platform in the process. We further clean up the use of platform specific header files here, with the goal of turning more of the platforms over to being "multiplatform" enabled, which implies that they cannot expose their headers to architecture independent code any more. It is expected that no functional changes are part of the cleanup. The overall reduction in total code lines is mostly the result of removing broken and obsolete code." * tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (133 commits) ARM: mvebu: correct gated clock documentation ARM: kirkwood: add missing include for nsa310 ARM: exynos: move exynos4210-combiner to drivers/irqchip mfd: db8500-prcmu: update resource passing drivers/db8500-cpufreq: delete dangling include ARM: at91: remove NEOCORE 926 board sunxi: Cleanup the reset code and add meaningful registers defines ARM: S3C24XX: header mach/regs-mem.h local ARM: S3C24XX: header mach/regs-power.h local ARM: S3C24XX: header mach/regs-s3c2412-mem.h local ARM: S3C24XX: Remove plat-s3c24xx directory in arch/arm/ ARM: S3C24XX: transform s3c2443 subirqs into new structure ARM: S3C24XX: modify s3c2443 irq init to initialize all irqs ARM: S3C24XX: move s3c2443 irq code to irq.c ARM: S3C24XX: transform s3c2416 irqs into new structure ARM: S3C24XX: modify s3c2416 irq init to initialize all irqs ARM: S3C24XX: move s3c2416 irq init to common irq code ARM: S3C24XX: Modify s3c_irq_wake to use the hwirq property ARM: S3C24XX: Move irq syscore-ops to irq-pm clocksource: always define CLOCKSOURCE_OF_DECLARE ... 
Pull ARM SoC cleanups from Arnd Bergmann:
 "A large number of cleanups, all over the platforms.  This is dominated
  largely by the Samsung platforms (s3c, s5p, exynos) and a few of the
  others moving code out of arch/arm into more appropriate subsystems.

  The clocksource and irqchip drivers are now abstracted to the point
  where platforms that are already cleaned up do not need to even
  specify the driver they use, it can all get configured from the device
  tree as we do for normal device drivers.  The clocksource changes
  basically touch every single platform in the process.

  We further clean up the use of platform specific header files here,
  with the goal of turning more of the platforms over to being
  "multiplatform" enabled, which implies that they cannot expose their
  headers to architecture independent code any more.

  It is expected that no functional changes are part of the cleanup.
  The overall reduction in total code lines is mostly the result of
  removing broken and obsolete code."

* tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (133 commits)
  ARM: mvebu: correct gated clock documentation
  ARM: kirkwood: add missing include for nsa310
  ARM: exynos: move exynos4210-combiner to drivers/irqchip
  mfd: db8500-prcmu: update resource passing
  drivers/db8500-cpufreq: delete dangling include
  ARM: at91: remove NEOCORE 926 board
  sunxi: Cleanup the reset code and add meaningful registers defines
  ARM: S3C24XX: header mach/regs-mem.h local
  ARM: S3C24XX: header mach/regs-power.h local
  ARM: S3C24XX: header mach/regs-s3c2412-mem.h local
  ARM: S3C24XX: Remove plat-s3c24xx directory in arch/arm/
  ARM: S3C24XX: transform s3c2443 subirqs into new structure
  ARM: S3C24XX: modify s3c2443 irq init to initialize all irqs
  ARM: S3C24XX: move s3c2443 irq code to irq.c
  ARM: S3C24XX: transform s3c2416 irqs into new structure
  ARM: S3C24XX: modify s3c2416 irq init to initialize all irqs
  ARM: S3C24XX: move s3c2416 irq init to common irq code
  ARM: S3C24XX: Modify s3c_irq_wake to use the hwirq property
  ARM: S3C24XX: Move irq syscore-ops to irq-pm
  clocksource: always define CLOCKSOURCE_OF_DECLARE
  ...
Merge tag 'fixes-non-critical' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc 2013-02-21T22:54:55+00:00 Linus Torvalds torvalds@linux-foundation.org 2013-02-21T22:54:55+00:00 b24174b0cbbe383c5bb6097aeb24480b8fd2d338 Pull non-critical ARM SoC bug fixes from Arnd Bergmann: "Bug fixes that did not make it into v3.8, mostly because they were not considered important enough, and in some cases because bugs only show up in combination with other patches destined for 3.9. This includes a few larger patches for GPIO on the Marvell PXA platform and a lot of Samsung specific bug fixes, as well as a series from Arnd to fix older build warnings." * tag 'fixes-non-critical' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (54 commits) ARM: SPEAr13xx: Enable CONFIG_ARCH_HAS_CPUFREQ ARM: imx: MACH_MX31ADS_WM1133_EV1 needs REGULATOR_WM8350 scripts/sortextable: silence script output ARM: s3c: i2c: add platform_device forward declaration ARM: mvebu: allow selecting mvebu without Armada XP ARM: pick Versatile by default for !MMU ARM: integrator: fix build with INTEGRATOR_AP off ARM: integrator/versatile: fix NOMMU warnings ARM: sa1100: don't warn about mach/ide.h ARM: shmobile: fix defconfig warning on CONFIG_USB ARM: w90x900: fix legacy assembly syntax ARM: samsung: fix assembly syntax for new gas ARM: disable virt_to_bus/virt_to_bus almost everywhere ARM: dts: Correct pin configuration of SD 4 for exynos4x12-pinctrl ARM: SAMSUNG: Silence empty switch warning in fimc-core.h ARM: SAMSUNG: Silence empty switch warning in sdhci.h ARM: msm: proc_comm_boot_wait should not be __init arm: vt8500: Update MAINTAINERS entry for arch-vt8500 ARM: integrator: ensure ap_syscon_base is initialised when !CONFIG_MMU ARM: S5PV210: Fix early uart output in fifo mode ... 
Pull non-critical ARM SoC bug fixes from Arnd Bergmann:
 "Bug fixes that did not make it into v3.8, mostly because they were not
  considered important enough, and in some cases because bugs only show
  up in combination with other patches destined for 3.9.  This includes
  a few larger patches for GPIO on the Marvell PXA platform and a lot of
  Samsung specific bug fixes, as well as a series from Arnd to fix older
  build warnings."

* tag 'fixes-non-critical' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (54 commits)
  ARM: SPEAr13xx: Enable CONFIG_ARCH_HAS_CPUFREQ
  ARM: imx: MACH_MX31ADS_WM1133_EV1 needs REGULATOR_WM8350
  scripts/sortextable: silence script output
  ARM: s3c: i2c: add platform_device forward declaration
  ARM: mvebu: allow selecting mvebu without Armada XP
  ARM: pick Versatile by default for !MMU
  ARM: integrator: fix build with INTEGRATOR_AP off
  ARM: integrator/versatile: fix NOMMU warnings
  ARM: sa1100: don't warn about mach/ide.h
  ARM: shmobile: fix defconfig warning on CONFIG_USB
  ARM: w90x900: fix legacy assembly syntax
  ARM: samsung: fix assembly syntax for new gas
  ARM: disable virt_to_bus/virt_to_bus almost everywhere
  ARM: dts: Correct pin configuration of SD 4 for exynos4x12-pinctrl
  ARM: SAMSUNG: Silence empty switch warning in fimc-core.h
  ARM: SAMSUNG: Silence empty switch warning in sdhci.h
  ARM: msm: proc_comm_boot_wait should not be __init
  arm: vt8500: Update MAINTAINERS entry for arch-vt8500
  ARM: integrator: ensure ap_syscon_base is initialised when !CONFIG_MMU
  ARM: S5PV210: Fix early uart output in fifo mode
  ...