linux.git/arch/arm/kernel/smp.c, branch v3.14

ARM: SMP implementations are not supposed to return from smp_ops.cpu_die()

2014-01-21T16:42:14+00:00

Although we allow recovery in this case, this is not supposed to be
the normal path for hotplugging a CPU back in.  This path only exists
to serve those rare platforms where it's not possible to power down
the CPU or reset the CPU.  This patch causes the kernel to print a
message when a platform uses this path.

Signed-off-by: Russell King

ARM: 7918/1: clean up cache handling in core code

2013-12-29T12:32:38+00:00

We have a handy macro to replace open coded __cpuc_flush_dcache_area(()
and outer_clean_range() sequences. Let's use it. No functional change.

Signed-off-by: Nicolas Pitre 
Signed-off-by: Russell King

Merge branch 'devel-stable' into for-next

2013-11-12T10:58:59+00:00

Conflicts:
	arch/arm/include/asm/atomic.h
	arch/arm/include/asm/hardirq.h
	arch/arm/kernel/smp.c

ARM: 7887/1: Don't smp_cross_call() on UP devices in arch_irq_work_raise()

2013-11-09T00:00:07+00:00

If we're running a kernel compiled with SMP_ON_UP=y and the
hardware only supports UP operation there isn't any
smp_cross_call function assigned. Unfortunately, we call
smp_cross_call() unconditionally in arch_irq_work_raise() and
crash the kernel on UP devices. Check to make sure we're running
on an SMP device before calling smp_cross_call() here.

Unable to handle kernel NULL pointer dereference at virtual address 00000000
pgd = c0004000
[00000000] *pgd=00000000
Internal error: Oops: 80000005 [#1] SMP ARM
Modules linked in:
CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.12.0-rc6-00018-g8d45144-dirty #16
task: de05b440 ti: de05c000 task.ti: de05c000
PC is at 0x0
LR is at arch_irq_work_raise+0x3c/0x48
pc : [<00000000>]    lr : []    psr: 60000193
sp : de05dd60  ip : 00000001  fp : 00000000
r10: c085e2f0  r9 : de05c000  r8 : c07be0a4
r7 : de05c000  r6 : de05c000  r5 : c07c5778  r4 : c0824554
r3 : 00000000  r2 : 00000000  r1 : 00000006  r0 : c0529a58
Flags: nZCv  IRQs off  FIQs on  Mode SVC_32  ISA ARM Segment kernel
Control: 10c5387d  Table: 80004019  DAC: 00000017
Process swapper/0 (pid: 1, stack limit = 0xde05c248)
Stack: (0xde05dd60 to 0xde05e000)
dd60: c07b9dbc c00cb2dc 00000001 c08242c0 c08242c0 60000113 c07be0a8 c00b0590
dd80: de05c000 c085e2f0 c08242c0 c08242c0 c1414c28 c00b07cc de05b440 c1414c28
dda0: c08242c0 c00b0af8 c0862bb0 c0862db0 c1414cd8 de05c028 c0824840 de05ddb8
ddc0: 00000000 00000009 00000001 00000024 c07be0a8 c07be0a4 de05c000 c085e2f0
dde0: 00000000 c004a4b0 00000010 de00d2dc 00000054 00000100 00000024 00000000
de00: de05c028 0000000a ffff8ae7 00200040 00000016 de05c000 60000193 de05c000
de20: 00000054 00000000 00000000 00000000 00000000 c004a704 00000000 de05c008
de40: c07ba254 c004aa1c c07c5778 c0014b70 fa200000 00000054 de05de80 c0861244
de60: 00000000 c0008634 de05b440 c051c778 20000113 ffffffff de05deb4 c051d0a4
de80: 00000001 00000001 00000000 de05b440 c082afac de057ac0 de057ac0 de0443c0
dea0: 00000000 00000000 00000000 00000000 c082afbc de05dec8 c009f2a0 c051c778
dec0: 20000113 ffffffff 00000000 c016edb0 00000000 000002b0 de057ac0 de057ac0
dee0: 00000000 c016ee40 c0875e50 de05df2e de057ac0 00000000 00000013 00000000
df00: 00000000 c016f054 de043600 de0443c0 c008eb38 de004ec0 c0875e50 c008eb44
df20: 00000012 00000000 00000000 3931f0f8 00000000 00000000 00000014 c0822e84
df40: 00000000 c008ed2c 00000000 00000000 00000000 c07b7490 c07b7490 c075ab3c
df60: 00000000 c00701ac 00000002 00000000 c0070160 dffadb73 7bf8edb4 00000000
df80: c051092c 00000000 00000000 00000000 00000000 00000000 00000000 c0510934
dfa0: de05aa40 00000000 c051092c c0013ce8 00000000 00000000 00000000 00000000
dfc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
dfe0: 00000000 00000000 00000000 00000000 00000013 00000000 07efffe5 4dfac6f5
[] (arch_irq_work_raise+0x3c/0x48) from [] (irq_work_queue+0xe4/0xf8)
[] (irq_work_queue+0xe4/0xf8) from [] (rcu_accelerate_cbs+0x1d4/0x1d8)
[] (rcu_accelerate_cbs+0x1d4/0x1d8) from [] (rcu_start_gp+0x34/0x48)
[] (rcu_start_gp+0x34/0x48) from [] (rcu_process_callbacks+0x318/0x608)
[] (rcu_process_callbacks+0x318/0x608) from [] (__do_softirq+0x114/0x2a0)
[] (__do_softirq+0x114/0x2a0) from [] (do_softirq+0x6c/0x74)
[] (do_softirq+0x6c/0x74) from [] (irq_exit+0xac/0x100)
[] (irq_exit+0xac/0x100) from [] (handle_IRQ+0x54/0xb4)
[] (handle_IRQ+0x54/0xb4) from [] (omap3_intc_handle_irq+0x60/0x74)
[] (omap3_intc_handle_irq+0x60/0x74) from [] (__irq_svc+0x44/0x5c)
Exception stack(0xde05de80 to 0xde05dec8)
de80: 00000001 00000001 00000000 de05b440 c082afac de057ac0 de057ac0 de0443c0
dea0: 00000000 00000000 00000000 00000000 c082afbc de05dec8 c009f2a0 c051c778
dec0: 20000113 ffffffff
[] (__irq_svc+0x44/0x5c) from [] (_raw_spin_unlock_irq+0x28/0x2c)
[] (_raw_spin_unlock_irq+0x28/0x2c) from [] (proc_alloc_inum+0x30/0xa8)
[] (proc_alloc_inum+0x30/0xa8) from [] (proc_register+0x18/0x130)
[] (proc_register+0x18/0x130) from [] (proc_mkdir_data+0x44/0x6c)
[] (proc_mkdir_data+0x44/0x6c) from [] (register_irq_proc+0x6c/0x128)
[] (register_irq_proc+0x6c/0x128) from [] (init_irq_proc+0x74/0xb0)
[] (init_irq_proc+0x74/0xb0) from [] (kernel_init_freeable+0x84/0x1c8)
[] (kernel_init_freeable+0x84/0x1c8) from [] (kernel_init+0x8/0x150)
[] (kernel_init+0x8/0x150) from [] (ret_from_fork+0x14/0x2c)
Code: bad PC value

Fixes: bf18525fd79 "ARM: 7872/1: Support arch_irq_work_raise() via self IPIs"

Reported-by: Olof Johansson 
Signed-off-by: Stephen Boyd 
Tested-by: Olof Johansson 
Signed-off-by: Russell King

ARM: 7872/1: Support arch_irq_work_raise() via self IPIs

2013-11-07T00:21:26+00:00

By default, IRQ work is run from the tick interrupt (see
irq_work_run() in update_process_times()). When we're in full
NOHZ mode, restarting the tick requires the use of IRQ work and
if the only place we run IRQ work is in the tick interrupt we
have an unbreakable cycle. Implement arch_irq_work_raise() via
self IPIs to break this cycle and get the tick started again.
Note that we implement this via IPIs which are only available on
SMP builds. This shouldn't be a problem because full NOHZ is only
supported on SMP builds anyway.

Signed-off-by: Stephen Boyd 
Reviewed-by: Kevin Hilman 
Cc: Frederic Weisbecker 
Signed-off-by: Russell King

Merge branch 'for-rmk/arm-mm-lpae' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into devel-stable

2013-10-18T18:16:01+00:00

This series extends the existing ARM v2p runtime patching for 64 bit.
Needed for LPAE machines which have physical memory beyond 4GB.

ARM: mm: Introduce virt_to_idmap() with an arch hook

2013-10-11T00:25:06+00:00

On some PAE systems (e.g. TI Keystone), memory is above the
32-bit addressable limit, and the interconnect provides an
aliased view of parts of physical memory in the 32-bit addressable
space.  This alias is strictly for boot time usage, and is not
otherwise usable because of coherency limitations. On such systems,
the idmap mechanism needs to take this aliased mapping into account.

This patch introduces virt_to_idmap() and a arch function pointer which
can be populated by platform which needs it. Also populate necessary
idmap spots with now available virt_to_idmap(). Avoided #ifdef approach
to be compatible with multi-platform builds.

Most architecture won't touch it and in that case virt_to_idmap()
fall-back to existing virt_to_phys() macro.

Cc: Russell King 

Acked-by: Nicolas Pitre 
Signed-off-by: Santosh Shilimkar

ARM: SMP: basic IPI triggered completion support

2013-09-23T22:47:26+00:00

We need a mechanism to let an inbound CPU signal that it is alive before
even getting into the kernel environment i.e. from early assembly code.
Using an IPI is the simplest way to achieve that.

This adds some basic infrastructure to register a struct completion
pointer to be "completed" when the dedicated IPI for this task is
received.

Signed-off-by: Nicolas Pitre

Merge tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

2013-09-06T20:21:16+00:00

Pull ARM SoC cleanups from Olof Johansson:
 "This branch contains code cleanups, moves and removals for 3.12.

  There's a large number of various cleanups, and a nice net removal of
  13500 lines of code.

  Highlights worth mentioning are:

   - A series of patches from Stephen Boyd removing the ARM local timer
     API.
   - Move of Qualcomm MSM IOMMU code to drivers/iommu.
   - Samsung PWM driver cleanups from Tomasz Figa, removing legacy PWM
     driver and switching over to the drivers/pwm one.
   - Removal of some unusued auto-generated headers for OMAP2+ (PRM/CM).

  There's also a move of a header file out of include/linux/i2c/ to
  platform_data, where it really belongs.  It touches mostly ARM
  platform code for include changes so we took it through our tree"

* tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (83 commits)
  ARM: OMAP2+: Add back the define for AM33XX_RST_GLOBAL_WARM_SW_MASK
  gpio: (gpio-pca953x) move header to linux/platform_data/
  arm: zynq: hotplug: Remove unreachable code
  ARM: SAMSUNG: Remove unnecessary exynos4_default_sdhci*()
  tegra: simplify use of devm_ioremap_resource
  ARM: SAMSUNG: Remove plat/regs-timer.h header
  ARM: SAMSUNG: Remove remaining uses of plat/regs-timer.h header
  ARM: SAMSUNG: Remove pwm-clock infrastructure
  ARM: SAMSUNG: Remove old PWM timer platform devices
  pwm: Remove superseded pwm-samsung-legacy driver
  ARM: SAMSUNG: Modify board files to use new PWM platform device
  ARM: SAMSUNG: Rework private data handling in dev-backlight
  pwm: Add new pwm-samsung driver
  ARM: mach-mvebu: remove redundant DT parsing and validation
  ARM: msm: Only compile io.c on platforms that use it
  iommu/msm: Move mach includes to iommu directory
  ARM: msm: Remove devices-iommu.c
  ARM: msm: Move mach/board.h contents to common.h
  ARM: msm: Migrate msm_timer to CLOCKSOURCE_OF_DECLARE
  ARM: msm: Remove TMR and TMR0 static mappings
  ...

Merge branches 'debug-choice', 'devel-stable' and 'misc' into for-linus

2013-09-05T09:34:15+00:00