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<title>linux.git/arch/arm/kernel/process.c, branch v2.6.37</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>Merge branch 'devel-stable' into devel</title>
<updated>2010-10-19T21:06:36+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2010-10-19T21:06:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=809b4e00baf006a990a73329ba381d536c6fa277'/>
<id>809b4e00baf006a990a73329ba381d536c6fa277</id>
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<pre>
</pre>
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</entry>
<entry>
<title>Merge branches 'at91', 'dcache', 'ftrace', 'hwbpt', 'misc', 'mmci', 's3c', 'st-ux' and 'unwind' into devel</title>
<updated>2010-10-18T21:34:25+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2010-10-18T21:34:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=23beab76b490172a9ff3d52843e4d27a35b2a4c6'/>
<id>23beab76b490172a9ff3d52843e4d27a35b2a4c6</id>
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<pre>
</pre>
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</entry>
<entry>
<title>ARM: 6428/1: add cpu_idle_wait() to support CPUidle on SMP systems.</title>
<updated>2010-10-08T09:02:24+00:00</updated>
<author>
<name>Kevin Hilman</name>
<email>khilman@deeprootsystems.com</email>
</author>
<published>2010-10-01T21:13:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=c7b0aff44a0740eedd31b759fd08d9e25672fa76'/>
<id>c7b0aff44a0740eedd31b759fd08d9e25672fa76</id>
<content type='text'>
In order for CPUidle to work on SMP systems, an implementation of
cpu_idle_wait() is needed.

This patch duplicates the x86 implementation of cpu_idle_wait() for
ARM.

Tested-by: Colin Cross &lt;ccross@android.com&gt;
Signed-off-by: Kevin Hilman &lt;khilman@deeprootsystems.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
In order for CPUidle to work on SMP systems, an implementation of
cpu_idle_wait() is needed.

This patch duplicates the x86 implementation of cpu_idle_wait() for
ARM.

Tested-by: Colin Cross &lt;ccross@android.com&gt;
Signed-off-by: Kevin Hilman &lt;khilman@deeprootsystems.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: add a vma entry for the user accessible vector page</title>
<updated>2010-10-02T02:35:19+00:00</updated>
<author>
<name>Nicolas Pitre</name>
<email>nico@fluxnic.net</email>
</author>
<published>2010-08-27T03:10:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=ec706dab290c486837d4a825870ab052bf200279'/>
<id>ec706dab290c486837d4a825870ab052bf200279</id>
<content type='text'>
The kernel makes the high vector page visible to user space. This page
contains (amongst others) small code segments that can be executed in
user space.  Make this page visible through ptrace and /proc/&lt;pid&gt;/mem
in order to let gdb perform code parsing needed for proper unwinding.

For example, the ERESTART_RESTARTBLOCK handler actually has a stack
frame -- it returns to a PC value stored on the user's stack.   To
unwind after a "sleep" system call was interrupted twice, GDB would
have to recognize this situation and understand that stack frame
layout -- which it currently cannot do.

We could fix this by hard-coding addresses in the vector page range into
GDB, but that isn't really portable as not all of those addresses are
guaranteed to remain stable across kernel releases.  And having the gdb
process make an exception for this page and get  content from its own
address space for it looks strange, and it is not future proof either.

Being located above PAGE_OFFSET, this vma cannot be deleted by
user space code.

Signed-off-by: Nicolas Pitre &lt;nicolas.pitre@linaro.org&gt;
</content>
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<pre>
The kernel makes the high vector page visible to user space. This page
contains (amongst others) small code segments that can be executed in
user space.  Make this page visible through ptrace and /proc/&lt;pid&gt;/mem
in order to let gdb perform code parsing needed for proper unwinding.

For example, the ERESTART_RESTARTBLOCK handler actually has a stack
frame -- it returns to a PC value stored on the user's stack.   To
unwind after a "sleep" system call was interrupted twice, GDB would
have to recognize this situation and understand that stack frame
layout -- which it currently cannot do.

We could fix this by hard-coding addresses in the vector page range into
GDB, but that isn't really portable as not all of those addresses are
guaranteed to remain stable across kernel releases.  And having the gdb
process make an exception for this page and get  content from its own
address space for it looks strange, and it is not future proof either.

Being located above PAGE_OFFSET, this vma cannot be deleted by
user space code.

Signed-off-by: Nicolas Pitre &lt;nicolas.pitre@linaro.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: 6357/1: hw-breakpoint: add new ptrace requests for hw-breakpoint interaction</title>
<updated>2010-09-08T09:05:00+00:00</updated>
<author>
<name>Will Deacon</name>
<email>will.deacon@arm.com</email>
</author>
<published>2010-09-03T09:42:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=864232fa1a2f8dfe003438ef0851a56722740f3e'/>
<id>864232fa1a2f8dfe003438ef0851a56722740f3e</id>
<content type='text'>
For debuggers to take advantage of the hw-breakpoint framework in the kernel,
it is necessary to expose the API calls via a ptrace interface.

This patch exposes the hardware breakpoints framework as a collection of
virtual registers, accesible using PTRACE_SETHBPREGS and PTRACE_GETHBPREGS
requests. The breakpoints are stored in the debug_info struct of the running
thread.

Cc: Frederic Weisbecker &lt;fweisbec@gmail.com&gt;
Cc: S. Karthikeyan &lt;informkarthik@gmail.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
For debuggers to take advantage of the hw-breakpoint framework in the kernel,
it is necessary to expose the API calls via a ptrace interface.

This patch exposes the hardware breakpoints framework as a collection of
virtual registers, accesible using PTRACE_SETHBPREGS and PTRACE_GETHBPREGS
requests. The breakpoints are stored in the debug_info struct of the running
thread.

Cc: Frederic Weisbecker &lt;fweisbec@gmail.com&gt;
Cc: S. Karthikeyan &lt;informkarthik@gmail.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'devel-stable' into devel</title>
<updated>2010-07-31T13:20:16+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2010-07-31T13:20:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=7b70c4275f28702b76b273c8534c38f8313812e9'/>
<id>7b70c4275f28702b76b273c8534c38f8313812e9</id>
<content type='text'>
Conflicts:
	arch/arm/kernel/entry-armv.S
	arch/arm/kernel/setup.c
	arch/arm/mm/init.c
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Conflicts:
	arch/arm/kernel/entry-armv.S
	arch/arm/kernel/setup.c
	arch/arm/mm/init.c
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: call machine_shutdown() from machine_halt(), etc</title>
<updated>2010-07-27T09:48:43+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2010-07-26T12:31:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=3d3f78d752bfada5b6041f2f7bd0833d8bdf7a4a'/>
<id>3d3f78d752bfada5b6041f2f7bd0833d8bdf7a4a</id>
<content type='text'>
x86 calls machine_shutdown() from the various machine_*() calls which
take the machine down ready for halting, restarting, etc, and uses
this to bring the system safely to a point where those actions can be
performed.  Such actions are stopping the secondary CPUs.

So, change the ARM implementation of these to reflect what x86 does.

This solves kexec problems on ARM SMP platforms, where the secondary
CPUs were left running across the kexec call.

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
x86 calls machine_shutdown() from the various machine_*() calls which
take the machine down ready for halting, restarting, etc, and uses
this to bring the system safely to a point where those actions can be
performed.  Such actions are stopping the secondary CPUs.

So, change the ARM implementation of these to reflect what x86 does.

This solves kexec problems on ARM SMP platforms, where the secondary
CPUs were left running across the kexec call.

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: Factor out common code from cpu_proc_fin()</title>
<updated>2010-07-27T09:48:42+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2010-07-26T11:22:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=9ca03a21e320a6bf44559323527aba704bcc8772'/>
<id>9ca03a21e320a6bf44559323527aba704bcc8772</id>
<content type='text'>
All implementations of cpu_proc_fin() start by disabling interrupts
and then flush caches.  Rather than have every processors proc_fin()
implementation do this, move it out into generic code - and move the
cache flush past setup_mm_for_reboot() (so it can benefit from having
caches still enabled.)

This allows cpu_proc_fin() to become independent of the L1/L2 cache
types, and eventually move the L2 cache flushing into the L2 support
code.

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
All implementations of cpu_proc_fin() start by disabling interrupts
and then flush caches.  Rather than have every processors proc_fin()
implementation do this, move it out into generic code - and move the
cache flush past setup_mm_for_reboot() (so it can benefit from having
caches still enabled.)

This allows cpu_proc_fin() to become independent of the L1/L2 cache
types, and eventually move the L2 cache flushing into the L2 support
code.

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge git://git.kernel.org/pub/scm/linux/kernel/git/nico/orion into devel-stable</title>
<updated>2010-07-21T08:22:45+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2010-07-21T08:22:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=14764b01a5576ce23a9d0c95a027049206a19cef'/>
<id>14764b01a5576ce23a9d0c95a027049206a19cef</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: lockdep: fix unannotated irqs-on</title>
<updated>2010-07-10T09:53:13+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk+kernel@arm.linux.org.uk</email>
</author>
<published>2010-07-10T09:10:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=ac78884e6d89714d18b32b5b7d574116ecfb7c88'/>
<id>ac78884e6d89714d18b32b5b7d574116ecfb7c88</id>
<content type='text'>
CPU: Testing write buffer coherency: ok
------------[ cut here ]------------
WARNING: at kernel/lockdep.c:3145 check_flags+0xcc/0x1dc()
Modules linked in:
[&lt;c0035120&gt;] (unwind_backtrace+0x0/0xf8) from [&lt;c0355374&gt;] (dump_stack+0x20/0x24)
[&lt;c0355374&gt;] (dump_stack+0x20/0x24) from [&lt;c0060c04&gt;] (warn_slowpath_common+0x58/0x70)
[&lt;c0060c04&gt;] (warn_slowpath_common+0x58/0x70) from [&lt;c0060c3c&gt;] (warn_slowpath_null+0x20/0x24)
[&lt;c0060c3c&gt;] (warn_slowpath_null+0x20/0x24) from [&lt;c008f224&gt;] (check_flags+0xcc/0x1dc)
[&lt;c008f224&gt;] (check_flags+0xcc/0x1dc) from [&lt;c00945dc&gt;] (lock_acquire+0x50/0x140)
[&lt;c00945dc&gt;] (lock_acquire+0x50/0x140) from [&lt;c0358434&gt;] (_raw_spin_lock+0x50/0x88)
[&lt;c0358434&gt;] (_raw_spin_lock+0x50/0x88) from [&lt;c00fd114&gt;] (set_task_comm+0x2c/0x60)
[&lt;c00fd114&gt;] (set_task_comm+0x2c/0x60) from [&lt;c007e184&gt;] (kthreadd+0x30/0x108)
[&lt;c007e184&gt;] (kthreadd+0x30/0x108) from [&lt;c0030104&gt;] (kernel_thread_exit+0x0/0x8)
---[ end trace 1b75b31a2719ed1c ]---
possible reason: unannotated irqs-on.
irq event stamp: 3
hardirqs last  enabled at (2): [&lt;c0059bb0&gt;] finish_task_switch+0x48/0xb0
hardirqs last disabled at (3): [&lt;c002f0b0&gt;] ret_slow_syscall+0xc/0x1c
softirqs last  enabled at (0): [&lt;c005f3e0&gt;] copy_process+0x394/0xe5c
softirqs last disabled at (0): [&lt;(null)&gt;] (null)

Fix this by ensuring that the lockdep interrupt state is manipulated in
the appropriate places.  We essentially treat userspace as an entirely
separate environment which isn't relevant to lockdep (lockdep doesn't
monitor userspace.)  We don't tell lockdep that IRQs will be enabled
in that environment.

Instead, when creating kernel threads (which is a rare event compared
to entering/leaving userspace) we have to update the lockdep state.  Do
this by starting threads with IRQs disabled, and in the kthread helper,
tell lockdep that IRQs are enabled, and enable them.

This provides lockdep with a consistent view of the current IRQ state
in kernel space.

This also revert portions of 0d928b0b616d1c5c5fe76019a87cba171ca91633
which didn't fix the problem.

Tested-by: Ming Lei &lt;tom.leiming@gmail.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
CPU: Testing write buffer coherency: ok
------------[ cut here ]------------
WARNING: at kernel/lockdep.c:3145 check_flags+0xcc/0x1dc()
Modules linked in:
[&lt;c0035120&gt;] (unwind_backtrace+0x0/0xf8) from [&lt;c0355374&gt;] (dump_stack+0x20/0x24)
[&lt;c0355374&gt;] (dump_stack+0x20/0x24) from [&lt;c0060c04&gt;] (warn_slowpath_common+0x58/0x70)
[&lt;c0060c04&gt;] (warn_slowpath_common+0x58/0x70) from [&lt;c0060c3c&gt;] (warn_slowpath_null+0x20/0x24)
[&lt;c0060c3c&gt;] (warn_slowpath_null+0x20/0x24) from [&lt;c008f224&gt;] (check_flags+0xcc/0x1dc)
[&lt;c008f224&gt;] (check_flags+0xcc/0x1dc) from [&lt;c00945dc&gt;] (lock_acquire+0x50/0x140)
[&lt;c00945dc&gt;] (lock_acquire+0x50/0x140) from [&lt;c0358434&gt;] (_raw_spin_lock+0x50/0x88)
[&lt;c0358434&gt;] (_raw_spin_lock+0x50/0x88) from [&lt;c00fd114&gt;] (set_task_comm+0x2c/0x60)
[&lt;c00fd114&gt;] (set_task_comm+0x2c/0x60) from [&lt;c007e184&gt;] (kthreadd+0x30/0x108)
[&lt;c007e184&gt;] (kthreadd+0x30/0x108) from [&lt;c0030104&gt;] (kernel_thread_exit+0x0/0x8)
---[ end trace 1b75b31a2719ed1c ]---
possible reason: unannotated irqs-on.
irq event stamp: 3
hardirqs last  enabled at (2): [&lt;c0059bb0&gt;] finish_task_switch+0x48/0xb0
hardirqs last disabled at (3): [&lt;c002f0b0&gt;] ret_slow_syscall+0xc/0x1c
softirqs last  enabled at (0): [&lt;c005f3e0&gt;] copy_process+0x394/0xe5c
softirqs last disabled at (0): [&lt;(null)&gt;] (null)

Fix this by ensuring that the lockdep interrupt state is manipulated in
the appropriate places.  We essentially treat userspace as an entirely
separate environment which isn't relevant to lockdep (lockdep doesn't
monitor userspace.)  We don't tell lockdep that IRQs will be enabled
in that environment.

Instead, when creating kernel threads (which is a rare event compared
to entering/leaving userspace) we have to update the lockdep state.  Do
this by starting threads with IRQs disabled, and in the kthread helper,
tell lockdep that IRQs are enabled, and enable them.

This provides lockdep with a consistent view of the current IRQ state
in kernel space.

This also revert portions of 0d928b0b616d1c5c5fe76019a87cba171ca91633
which didn't fix the problem.

Tested-by: Ming Lei &lt;tom.leiming@gmail.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</pre>
</div>
</content>
</entry>
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