linux.git/arch/arm/kernel/perf_event_cpu.c, branch v3.17

ARM: 8149/1: perf: Don't sleep while atomic when enabling per-cpu interrupts

2014-09-16T15:09:33+00:00

Rob Clark reports a sleeping while atomic bug when using perf.

BUG: sleeping function called from invalid context at ../kernel/locking/mutex.c:583
in_atomic(): 1, irqs_disabled(): 128, pid: 0, name: swapper/0
------------[ cut here ]------------
WARNING: CPU: 2 PID: 4828 at ../kernel/locking/mutex.c:479 mutex_lock_nested+0x3a0/0x3e8()
DEBUG_LOCKS_WARN_ON(in_interrupt())
Modules linked in:
CPU: 2 PID: 4828 Comm: Xorg.bin Tainted: G        W      3.17.0-rc3-00234-gd535c45-dirty #819
[] (unwind_backtrace) from [] (show_stack+0x10/0x14)
[] (show_stack) from [] (dump_stack+0x98/0xb8)
[] (dump_stack) from [] (warn_slowpath_common+0x70/0x8c)
[] (warn_slowpath_common) from [] (warn_slowpath_fmt+0x30/0x40)
[] (warn_slowpath_fmt) from [] (mutex_lock_nested+0x3a0/0x3e8)
[] (mutex_lock_nested) from [] (irq_find_host+0x20/0x9c)
[] (irq_find_host) from [] (of_irq_get+0x28/0x48)
[] (of_irq_get) from [] (platform_get_irq+0x1c/0x8c)
[] (platform_get_irq) from [] (cpu_pmu_enable_percpu_irq+0x14/0x38)
[] (cpu_pmu_enable_percpu_irq) from [] (flush_smp_call_function_queue+0x88/0x178)
[] (flush_smp_call_function_queue) from [] (handle_IPI+0x88/0x160)
[] (handle_IPI) from [] (gic_handle_irq+0x64/0x68)
[] (gic_handle_irq) from [] (__irq_svc+0x44/0x5c)
Exception stack(0xe63ddea0 to 0xe63ddee8)
dea0: 00000001 00000001 00000000 c2f3b200 c16db380 c032d4a0 e63ddf40 60010013
dec0: 00000000 001fbfd4 00000100 00000000 00000001 e63ddee8 c0284770 c02a2e30
dee0: 20010013 ffffffff
[] (__irq_svc) from [] (ktime_get_ts64+0x1c8/0x200)
[] (ktime_get_ts64) from [] (poll_select_set_timeout+0x60/0xa8)
[] (poll_select_set_timeout) from [] (SyS_select+0xa8/0x118)
[] (SyS_select) from [] (ret_fast_syscall+0x0/0x48)
---[ end trace 0bb583b46342da6f ]---
INFO: lockdep is turned off.

We don't really need to get the platform irq again when we're
enabling or disabling the per-cpu irq. Furthermore, we don't
really need to set and clear bits in the active_irqs bitmask
because that's only used in the non-percpu irq case to figure out
when the last CPU PMU has been disabled. Just pass the irq
directly to the enable/disable functions to clean all this up.
This should be slightly more efficient and also fix the
scheduling while atomic bug.

Fixes: bbd64559376f "ARM: perf: support percpu irqs for the CPU PMU"

Reported-by: Rob Clark 
Acked-by: Will Deacon 
Cc: stable@vger.kernel.org
Signed-off-by: Stephen Boyd 
Signed-off-by: Russell King

Merge branch 'devel-stable' into for-next

2014-08-05T09:27:25+00:00

Conflicts:
	arch/arm/kernel/perf_event_cpu.c

ARM: make it easier to check the CPU part number correctly

2014-07-18T11:29:02+00:00

Ensure that platform maintainers check the CPU part number in the right
manner: the CPU part number is meaningless without also checking the
CPU implement(e|o)r (choose your preferred spelling!)  Provide an
interface which returns both the implementer and part number together,
and update the definitions to include the implementer.

Mark the old function as being deprecated... indeed, using the old
function with the definitions will now always evaluate as false, so
people must update their un-merged code to the new function.  While
this could be avoided by adding new definitions, we'd also have to
create new names for them which would be awkward.

Acked-by: Nicolas Pitre 
Signed-off-by: Russell King

arm: perf: add more specific platform device IDs

2014-07-02T14:48:26+00:00

When described in DT, PMUs are given specific compatible strings
(e.g. "arm,cortex-a15-pmu") which makes it very easy to reorganise the
way individual PMUs are handled (i.e. we can easily split them into
separate drivers). The same is not true of PMUs described in board
files, which are all use the platform_device_id "arm-pmu" and must all
be handled by the same driver.

To enable splitting the ARMv6, ARMv7, and XScale PMU drivers we need
board files to identify which variant they provide. As a first step,
this patch adds new platform_device_id values: "armv6-pmu", "armv7-pmu,
and "xscale-pmu".

Once board files are moved over and all existing uses of "arm-pmu" are
gone, we can split the existing driver apart.

Acked-by: Will Deacon 
Tested-by: Christopher Covington 
Signed-off-by: Mark Rutland 
Signed-off-by: Will Deacon

arm: perf: clean up PMU names

2014-07-02T14:48:25+00:00

The perf userspace tools can't handle dashes or spaces in PMU names,
which conflicts with the current naming scheme in the arm perf backend.
This prevents these PMUs from being accessed by name from the perf
tools. Additionally the ARMv6 pmus are named "v6", which does not fully
distinguish them in the sys/bus/event_source namespace.

This patch renames the PMUs consistently to a lower case form with
underscores, e.g. "armv6_1176", "armv7_cortex_a9". This is both readily
accepted by today's perf tool, and far easier to type than the
(apparently unused) convention in use previously. The OProfile name
conversion code is updated to handle this.

Due to a copy-paste error involving two "xscale1" entries, "xscale2" has
never been matched by the name OProfile name mapping. While we're
updating names, this is corrected.

Acked-by: Will Deacon 
Tested-by: Christopher Covington 
Signed-off-by: Mark Rutland 
[sachin: fixed missing semicolons in armv6 backend]
Signed-off-by: Sachin Kamat 
Signed-off-by: Will Deacon

Merge branch 'perf-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

2014-06-13T02:18:49+00:00

Pull more perf updates from Ingo Molnar:
 "A second round of perf updates:

   - wide reaching kprobes sanitization and robustization, with the hope
     of fixing all 'probe this function crashes the kernel' bugs, by
     Masami Hiramatsu.

   - uprobes updates from Oleg Nesterov: tmpfs support, corner case
     fixes and robustization work.

   - perf tooling updates and fixes from Jiri Olsa, Namhyung Ki, Arnaldo
     et al:
        * Add support to accumulate hist periods (Namhyung Kim)
        * various fixes, refactorings and enhancements"

* 'perf-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (101 commits)
  perf: Differentiate exec() and non-exec() comm events
  perf: Fix perf_event_comm() vs. exec() assumption
  uprobes/x86: Rename arch_uprobe->def to ->defparam, minor comment updates
  perf/documentation: Add description for conditional branch filter
  perf/x86: Add conditional branch filtering support
  perf/tool: Add conditional branch filter 'cond' to perf record
  perf: Add new conditional branch filter 'PERF_SAMPLE_BRANCH_COND'
  uprobes: Teach copy_insn() to support tmpfs
  uprobes: Shift ->readpage check from __copy_insn() to uprobe_register()
  perf/x86: Use common PMU interrupt disabled code
  perf/ARM: Use common PMU interrupt disabled code
  perf: Disable sampled events if no PMU interrupt
  perf: Fix use after free in perf_remove_from_context()
  perf tools: Fix 'make help' message error
  perf record: Fix poll return value propagation
  perf tools: Move elide bool into perf_hpp_fmt struct
  perf tools: Remove elide setup for SORT_MODE__MEMORY mode
  perf tools: Fix "==" into "=" in ui_browser__warning assignment
  perf tools: Allow overriding sysfs and proc finding with env var
  perf tools: Consider header files outside perf directory in tags target
  ...

perf/ARM: Use common PMU interrupt disabled code

2014-06-05T10:30:00+00:00

Make the ARM perf code use the new common PMU interrupt disabled code.

This allows perf to work on ARM machines without a working PMU
interrupt (for example, raspberry pi).

Acked-by: Will Deacon 
Signed-off-by: Vince Weaver 
[peterz: applied changes suggested by Will]
Signed-off-by: Peter Zijlstra 
Cc: Arnaldo Carvalho de Melo 
Cc: Grant Likely 
Cc: Linus Torvalds 
Cc: Paul Mackerras 
Cc: Rob Herring 
Cc: Russell King 
Cc: Will Deacon 
Cc: devicetree@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Link: http://lkml.kernel.org/r/alpine.DEB.2.10.1405161712190.11099@vincent-weaver-1.umelst.maine.edu
[ Small readability tweaks to the code. ]
Signed-off-by: Ingo Molnar 

Signed-off-by: Ingo Molnar

ARM: 8054/1: perf: add support for the Cortex-A17 PMU

2014-05-25T22:49:43+00:00

The Cortex-A17 PMU is identical to that of the A12, so wire up a new
compatible string to the existing event structures.

Signed-off-by: Will Deacon 
Signed-off-by: Russell King

ARM: perf: add support for the Cortex-A12 PMU

2014-02-21T11:11:23+00:00

Cortex-A12 implements Performance Monitors compliant with the PMUv2
architecture.

This patch adds support for the Cortex-A12 PMU to the ARM perf backend.

Signed-off-by: Albin Tonnerre 
Signed-off-by: Will Deacon

ARM: perf: remove unused PMU probing code

2014-02-21T11:11:22+00:00

The ARM perf backend can discover the type of PMU it needs to drive
either from DT or by probing a CPU it is running on. For
Cortex-A{5,7,15} there are no platforms in mainline not using dt, and
this probing won't work well for big.LITTLE systems with heterogeneous
PMUs.

This patch drops the probing for those CPUs, relying on information from
dt instead. Future platforms should describe their PMU(s) with dt.

Suggested-by: Will Deacon 
Signed-off-by: Mark Rutland 
Signed-off-by: Will Deacon