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<title>linux.git/arch/arm/include/debug/brcmstb.S, branch v5.6</title>
<subtitle>Linux kernel source tree</subtitle>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/'/>
<entry>
<title>ARM: brcmstb: Add debug UART entry for 7216</title>
<updated>2019-12-20T18:54:05+00:00</updated>
<author>
<name>Justin Chen</name>
<email>justinpopo6@gmail.com</email>
</author>
<published>2019-12-10T22:48:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=064f42b28a6d6cfddc983cb433d52c3d3b006442'/>
<id>064f42b28a6d6cfddc983cb433d52c3d3b006442</id>
<content type='text'>
7216 has the same memory map as 7278 and the same physical address for
the UART, alias the definition accordingly.

Signed-off-by: Justin Chen &lt;justinpopo6@gmail.com&gt;
[florian: expand commit message]
Signed-off-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
</content>
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<pre>
7216 has the same memory map as 7278 and the same physical address for
the UART, alias the definition accordingly.

Signed-off-by: Justin Chen &lt;justinpopo6@gmail.com&gt;
[florian: expand commit message]
Signed-off-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: brcmstb: Add entry for 7255</title>
<updated>2018-11-07T00:40:59+00:00</updated>
<author>
<name>Justin Chen</name>
<email>justinpopo6@gmail.com</email>
</author>
<published>2017-11-10T19:54:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=8f34fe4a898c517ec29f9f36e414da35335bd7ca'/>
<id>8f34fe4a898c517ec29f9f36e414da35335bd7ca</id>
<content type='text'>
Add in BCM7255 entry and reorder entries to keep ascending order. Also
moved 7278 cause it was out of order.

Signed-off-by: Justin Chen &lt;justinpopo6@gmail.com&gt;
Signed-off-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
</content>
<content type='xhtml'>
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<pre>
Add in BCM7255 entry and reorder entries to keep ascending order. Also
moved 7278 cause it was out of order.

Signed-off-by: Justin Chen &lt;justinpopo6@gmail.com&gt;
Signed-off-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: brcmstb: Add support for the V7 memory map</title>
<updated>2018-05-09T19:14:42+00:00</updated>
<author>
<name>Doug Berger</name>
<email>opendmb@gmail.com</email>
</author>
<published>2018-02-23T21:09:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=56e4446df9c1214e886fdc7603a5c1cb99cb1843'/>
<id>56e4446df9c1214e886fdc7603a5c1cb99cb1843</id>
<content type='text'>
The 7278 device is the first device that includes support for the V7
memory map developed for use in 64-bit architecture brcmstb devices.
This map relocates the register physical offset from 0xF0000000 to
0x0000000008000000.

Since the ARM PERIPHBASE value is also relocated in the V7 memory map
we can use its value to determine whether this device uses the new
V7 memory map and therefore where to look for the SUN_TOP_CTRL
register used to identify the chip family.

Signed-off-by: Doug Berger &lt;opendmb@gmail.com&gt;
Signed-off-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
</content>
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<pre>
The 7278 device is the first device that includes support for the V7
memory map developed for use in 64-bit architecture brcmstb devices.
This map relocates the register physical offset from 0xF0000000 to
0x0000000008000000.

Since the ARM PERIPHBASE value is also relocated in the V7 memory map
we can use its value to determine whether this device uses the new
V7 memory map and therefore where to look for the SUN_TOP_CTRL
register used to identify the chip family.

Signed-off-by: Doug Berger &lt;opendmb@gmail.com&gt;
Signed-off-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: brcmstb: Add appropriate ARM_BE8() macros for swapping</title>
<updated>2017-09-25T18:56:04+00:00</updated>
<author>
<name>Florian Fainelli</name>
<email>f.fainelli@gmail.com</email>
</author>
<published>2017-08-29T18:03:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=c14963521502b237a6817aceda6f3379296db75c'/>
<id>c14963521502b237a6817aceda6f3379296db75c</id>
<content type='text'>
Building a big-endian kernel for ARCH_BRCMSTB revealed that we would not
be correctly polling for the right bit in the busyuart macro, turns out
there are a few transformations needed to work with big-endian kernels.
First we need to swap the value we read from SUN_TOP_CTRL to properly
compare it against our local tables. Then, just like 8250.S we need to
swap the value before storing it, and conversely swap it after a load.

Signed-off-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Building a big-endian kernel for ARCH_BRCMSTB revealed that we would not
be correctly polling for the right bit in the busyuart macro, turns out
there are a few transformations needed to work with big-endian kernels.
First we need to swap the value we read from SUN_TOP_CTRL to properly
compare it against our local tables. Then, just like 8250.S we need to
swap the value before storing it, and conversely swap it after a load.

Signed-off-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: brcmstb: Add entry for 7260</title>
<updated>2017-03-15T21:57:50+00:00</updated>
<author>
<name>Florian Fainelli</name>
<email>f.fainelli@gmail.com</email>
</author>
<published>2017-03-09T18:51:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=d47b51ad31e21ab8129da64d42e2fc48e7a215eb'/>
<id>d47b51ad31e21ab8129da64d42e2fc48e7a215eb</id>
<content type='text'>
BCM7260 has the same UART base address as 7268, order the entries by
ascending chip number and alias the 7268 definition to the 7260
definition.

Signed-off-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
BCM7260 has the same UART base address as 7268, order the entries by
ascending chip number and alias the 7268 definition to the 7260
definition.

Signed-off-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: brcmstb: Add earlyprintk support using run-time checks</title>
<updated>2016-08-08T18:14:09+00:00</updated>
<author>
<name>Florian Fainelli</name>
<email>f.fainelli@gmail.com</email>
</author>
<published>2016-06-28T19:18:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.tavy.me/linux.git/commit/?id=d0cf9d8a3c78cf70e3a78e898fdc1b2adea0e6dd'/>
<id>d0cf9d8a3c78cf70e3a78e898fdc1b2adea0e6dd</id>
<content type='text'>
The SUN_TOP_CTRL_FAMILY_ID register  is at a fixed absolute address for
all of our supported chips, so utilize its value to determine what the
UARTA base address should be based on the value we read.

Since the code is called both during decompressor when the MMU is off,
and after the MMU has been turned on in the kernel, and we want to do
the lookup only once, we use the same technique as tegra.S and have a
shared storage location between the decompressor and the kernel.

Signed-off-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The SUN_TOP_CTRL_FAMILY_ID register  is at a fixed absolute address for
all of our supported chips, so utilize its value to determine what the
UARTA base address should be based on the value we read.

Since the code is called both during decompressor when the MMU is off,
and after the MMU has been turned on in the kernel, and we want to do
the lookup only once, we use the same technique as tegra.S and have a
shared storage location between the decompressor and the kernel.

Signed-off-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
</pre>
</div>
</content>
</entry>
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