linux.git/arch/arm/common, branch v4.19

ARM: Always build secure_cntvoff.S on ARM V7 to fix shmobile !SMP build

2018-06-24T01:26:48+00:00

If CONFIG_SMP=n, building a kernel for R-Car Gen2 fails with:

    arch/arm/mach-shmobile/setup-rcar-gen2.o: In function `rcar_gen2_timer_init':
    setup-rcar-gen2.c:(.init.text+0x30): undefined reference to `secure_cntvoff_init'

Indeed, on R-Car Gen2 SoCs, secure_cntvoff_init() is not only needed for
secondary CPUs, but also for the boot CPU.  This is most visible on SoCs
with Cortex A7 cores (e.g. R-Car E2, cfr. commit 9ce3fa6816c2fb59 ("ARM:
shmobile: rcar-gen2: Add CA7 arch_timer initialization for r8a7794")),
but Cortex A15 is affected, too.

Fix this by always providing secure_cntvoff_init() when building for ARM
V7.

Reported-by: Arnd Bergmann 
Fixes: 7c607944bc657616 ("ARM: smp: Add initialization of CNTVOFF")
Fixes: cad160ed0a94927e ("ARM: shmobile: Convert file to use cntvoff")
Signed-off-by: Geert Uytterhoeven 
Reviewed-by: Maxime Ripard 
Reviewed-by: Simon Horman 
Signed-off-by: Olof Johansson

Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

2018-06-12T00:49:09+00:00

Pull ARM SoC platform updates from Olof Johansson:
 "Here are the main updates for SoC support (besides DT additions) for
  ARM 32- and 64-bit platforms. The branch also contains defconfig
  updates to turn on drivers and options as needed on the various
  platforms.

  The largest parts of the delta are from cleanups moving platform data
  and board file setup of TI platforms to ti-sysc bus drivers. There are
  also some sweeping changes of eeprom and nand setup on Davinci, i.MX
  and other platforms.

  Samsung is removing support for Exynos5440, which was an oddball SoC
  that hasn't been seen much use in designs.

  Renesas is adding support for new SoCs (R-Car E3, RZ/G1C and RZ/N1D).

  Linus Walleij is also removing support for ux500 (Sony Ericsson)
  U8540/9540 SoCs that never made it to significant mass production and
  products"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (133 commits)
  MAINTAINERS: add NXP linux team maillist as i.MX reviewer
  ARM: stm32: Don't select DMA unconditionally on STM32MP157C
  arm64: defconfig: Enable PCIe on msm8996 and db820c
  ARM: pxa3xx: enable external wakeup pins
  ARM: pxa: stargate2: use device properties for at24 eeprom
  arm64: defconfig: Enable HISILICON_LPC
  arm64: defconfig: enable drivers for Poplar support
  arm64: defconfig: Enable UFS on msm8996
  ARM: berlin: switch to SPDX license identifier
  arm: berlin: remove non-necessary flush_cache_all()
  ARM: berlin: extend BG2CD Kconfig entry
  OMAP: CLK: CLKSRC: Add suspend resume hooks
  ARM: AM43XX: Add functions to save/restore am43xx control registers
  ASoC: ams_delta: use GPIO lookup table
  ARM: OMAP1: ams-delta: add GPIO lookup tables
  bus: ti-sysc: Fix optional clocks array access
  ARM: OMAP2+: Make sure LOGICRETSTATE bits are not cleared
  ARM: OMAP2+: prm44xx: Inroduce cpu_pm notifiers for context save/restore
  ARM: OMAP2+: prm44xx: Introduce context save/restore for am43 PRCM IO
  ARM: OMAP2+: powerdomain: Introduce cpu_pm notifiers for context save/restore
  ...

ARM: mcpm, perf/arm-cci: export mcpm_is_available

2018-05-29T15:53:16+00:00

Now that the ARM CCI PMU driver can be built as a loadable module,
we get a link failure when MCPM is enabled:

ERROR: "mcpm_is_available" [drivers/perf/arm-cci.ko] undefined!

The simplest fix is to export that helper function.

Fixes: 8b0c93c20ef7 ("perf/arm-cci: Allow building as a module")
Acked-by: Nicolas Pitre 
Acked-by: Russell King 
Signed-off-by: Arnd Bergmann 
Signed-off-by: Will Deacon

ARM: smp: Add initialization of CNTVOFF

2018-05-08T12:50:42+00:00

The CNTVOFF register from arch timer is uninitialized.
It should be done by the bootloader but it is currently not the case,
even for boot CPU because this SoC is booting in secure mode.
It leads to an random offset value meaning that each CPU will have a
different time, which isn't working very well.

Add assembly code used for boot CPU and secondary CPU cores to make
sure that the CNTVOFF register is initialized. Because this code can
be used by different platforms, add this assembly file in ARM's common
folder.

Signed-off-by: Mylène Josserand 
Reviewed-by: Geert Uytterhoeven 
Tested-by: Geert Uytterhoeven 
Reviewed-by: Marc Zyngier 
Signed-off-by: Maxime Ripard

Merge branches 'fixes', 'misc', 'sa1111' and 'sa1100-for-next' into for-next

2018-01-21T15:38:10+00:00

ARM: 8743/1: bL_switcher: add MODULE_LICENSE tag

2018-01-21T15:32:27+00:00

Without this tag, we get a build warning:

WARNING: modpost: missing MODULE_LICENSE() in arch/arm/common/bL_switcher_dummy_if.o

For completeness, I'm also adding author and description fields.

Signed-off-by: Arnd Bergmann 
Signed-off-by: Russell King

ARM: sa1111: map interrupt numbers through irqdomain

2017-11-29T10:57:41+00:00

Map the interrupt numbers for SA1111 through the SA1111 IRQ domain
rather than doing our own translation.  This allows us to eliminate
the irq_base sachip member.

Signed-off-by: Russell King

ARM: sa1111: use an irqdomain for SA1111 interrupts

2017-11-29T10:57:41+00:00

Use an IRQ domain for SA1111 interrupts, which allows us to separate the
hardware interrupt number from the Linux interrupt number.  We can then
use the hardware interrupt number stored in the irq_data to calculate
the register offsets and mask.

Signed-off-by: Russell King

ARM: sa1111: remove special sa1111 mmio accessors

2017-11-29T10:57:41+00:00

Remove the special sa1111 mmio accessors from core sa1111 code, and
their definition in sa1111.h now that all users are gone.

Signed-off-by: Russell King

ARM: sa1111: remove legacy suspend/resume methods

2017-11-29T10:57:34+00:00

The legacy device-driver suspend/resume methods are not used by any of
our drivers, so let's remove this redundant code.

Acked-by: Rafael J. Wysocki 
Signed-off-by: Russell King